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Commit ea0d730a authored by Alex Deucher's avatar Alex Deucher
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drm/amdgpu/navi10_ppt: convert to IP version checking 

Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent af3b89d3
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Showing with 25 additions and 25 deletions
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
View file @ ea0d730a
...@@ -345,7 +345,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, ...@@ -345,7 +345,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
/* DPM UCLK enablement should be skipped for navi10 A0 secure board */ /* DPM UCLK enablement should be skipped for navi10 A0 secure board */
if (!(is_asic_secure(smu) && if (!(is_asic_secure(smu) &&
(adev->asic_type == CHIP_NAVI10) && (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) &&
(adev->rev_id == 0)) && (adev->rev_id == 0)) &&
(adev->pm.pp_feature & PP_MCLK_DPM_MASK)) (adev->pm.pp_feature & PP_MCLK_DPM_MASK))
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT)
...@@ -354,7 +354,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, ...@@ -354,7 +354,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
/* DS SOCCLK enablement should be skipped for navi10 A0 secure board */ /* DS SOCCLK enablement should be skipped for navi10 A0 secure board */
if (is_asic_secure(smu) && if (is_asic_secure(smu) &&
(adev->asic_type == CHIP_NAVI10) && (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) &&
(adev->rev_id == 0)) (adev->rev_id == 0))
*(uint64_t *)feature_mask &= *(uint64_t *)feature_mask &=
~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT); ~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT);
...@@ -925,18 +925,18 @@ static int navi1x_get_smu_metrics_data(struct smu_context *smu, ...@@ -925,18 +925,18 @@ static int navi1x_get_smu_metrics_data(struct smu_context *smu,
return ret; return ret;
} }
switch (adev->asic_type) { switch (adev->ip_versions[MP1_HWIP]) {
case CHIP_NAVI12: case IP_VERSION(11, 0, 9):
if (smu_version > 0x00341C00) if (smu_version > 0x00341C00)
ret = navi12_get_smu_metrics_data(smu, member, value); ret = navi12_get_smu_metrics_data(smu, member, value);
else else
ret = navi12_get_legacy_smu_metrics_data(smu, member, value); ret = navi12_get_legacy_smu_metrics_data(smu, member, value);
break; break;
case CHIP_NAVI10: case IP_VERSION(11, 0, 0):
case CHIP_NAVI14: case IP_VERSION(11, 0, 5):
default: default:
if (((adev->asic_type == CHIP_NAVI14) && smu_version > 0x00351F00) || if (((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5)) && smu_version > 0x00351F00) ||
((adev->asic_type == CHIP_NAVI10) && smu_version > 0x002A3B00)) ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) && smu_version > 0x002A3B00))
ret = navi10_get_smu_metrics_data(smu, member, value); ret = navi10_get_smu_metrics_data(smu, member, value);
else else
ret = navi10_get_legacy_smu_metrics_data(smu, member, value); ret = navi10_get_legacy_smu_metrics_data(smu, member, value);
...@@ -1509,8 +1509,8 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu) ...@@ -1509,8 +1509,8 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)
uint32_t sclk_freq; uint32_t sclk_freq;
pstate_table->gfxclk_pstate.min = gfx_table->min; pstate_table->gfxclk_pstate.min = gfx_table->min;
switch (adev->asic_type) { switch (adev->ip_versions[MP1_HWIP]) {
case CHIP_NAVI10: case IP_VERSION(11, 0, 0):
switch (adev->pdev->revision) { switch (adev->pdev->revision) {
case 0xf0: /* XTX */ case 0xf0: /* XTX */
case 0xc0: case 0xc0:
...@@ -1525,7 +1525,7 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu) ...@@ -1525,7 +1525,7 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)
break; break;
} }
break; break;
case CHIP_NAVI14: case IP_VERSION(11, 0, 5):
switch (adev->pdev->revision) { switch (adev->pdev->revision) {
case 0xc7: /* XT */ case 0xc7: /* XT */
case 0xf4: case 0xf4:
...@@ -1548,7 +1548,7 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu) ...@@ -1548,7 +1548,7 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)
break; break;
} }
break; break;
case CHIP_NAVI12: case IP_VERSION(11, 0, 9):
sclk_freq = NAVI12_UMD_PSTATE_PEAK_GFXCLK; sclk_freq = NAVI12_UMD_PSTATE_PEAK_GFXCLK;
break; break;
default: default:
...@@ -2562,8 +2562,8 @@ static bool navi10_need_umc_cdr_workaround(struct smu_context *smu) ...@@ -2562,8 +2562,8 @@ static bool navi10_need_umc_cdr_workaround(struct smu_context *smu)
if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT))
return false; return false;
if (adev->asic_type == CHIP_NAVI10 || if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0) ||
adev->asic_type == CHIP_NAVI14) adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5))
return true; return true;
return false; return false;
...@@ -2671,8 +2671,8 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu) ...@@ -2671,8 +2671,8 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
* - PPSMC_MSG_SetDriverDummyTableDramAddrLow * - PPSMC_MSG_SetDriverDummyTableDramAddrLow
* - PPSMC_MSG_GetUMCFWWA * - PPSMC_MSG_GetUMCFWWA
*/ */
if (((adev->asic_type == CHIP_NAVI10) && (pmfw_version >= 0x2a3500)) || if (((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) && (pmfw_version >= 0x2a3500)) ||
((adev->asic_type == CHIP_NAVI14) && (pmfw_version >= 0x351D00))) { ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5)) && (pmfw_version >= 0x351D00))) {
ret = smu_cmn_send_smc_msg_with_param(smu, ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_GET_UMC_FW_WA, SMU_MSG_GET_UMC_FW_WA,
0, 0,
...@@ -2691,13 +2691,13 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu) ...@@ -2691,13 +2691,13 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
return 0; return 0;
if (umc_fw_disable_cdr) { if (umc_fw_disable_cdr) {
if (adev->asic_type == CHIP_NAVI10) if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0))
return navi10_umc_hybrid_cdr_workaround(smu); return navi10_umc_hybrid_cdr_workaround(smu);
} else { } else {
return navi10_set_dummy_pstates_table_location(smu); return navi10_set_dummy_pstates_table_location(smu);
} }
} else { } else {
if (adev->asic_type == CHIP_NAVI10) if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0))
return navi10_umc_hybrid_cdr_workaround(smu); return navi10_umc_hybrid_cdr_workaround(smu);
} }
...@@ -3151,18 +3151,18 @@ static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu, ...@@ -3151,18 +3151,18 @@ static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
return ret; return ret;
} }
switch (adev->asic_type) { switch (adev->ip_versions[MP1_HWIP]) {
case CHIP_NAVI12: case IP_VERSION(11, 0, 9):
if (smu_version > 0x00341C00) if (smu_version > 0x00341C00)
ret = navi12_get_gpu_metrics(smu, table); ret = navi12_get_gpu_metrics(smu, table);
else else
ret = navi12_get_legacy_gpu_metrics(smu, table); ret = navi12_get_legacy_gpu_metrics(smu, table);
break; break;
case CHIP_NAVI10: case IP_VERSION(11, 0, 0):
case CHIP_NAVI14: case IP_VERSION(11, 0, 5):
default: default:
if (((adev->asic_type == CHIP_NAVI14) && smu_version > 0x00351F00) || if (((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5)) && smu_version > 0x00351F00) ||
((adev->asic_type == CHIP_NAVI10) && smu_version > 0x002A3B00)) ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) && smu_version > 0x002A3B00))
ret = navi10_get_gpu_metrics(smu, table); ret = navi10_get_gpu_metrics(smu, table);
else else
ret =navi10_get_legacy_gpu_metrics(smu, table); ret =navi10_get_legacy_gpu_metrics(smu, table);
...@@ -3180,7 +3180,7 @@ static int navi10_enable_mgpu_fan_boost(struct smu_context *smu) ...@@ -3180,7 +3180,7 @@ static int navi10_enable_mgpu_fan_boost(struct smu_context *smu)
uint32_t param = 0; uint32_t param = 0;
/* Navi12 does not support this */ /* Navi12 does not support this */
if (adev->asic_type == CHIP_NAVI12) if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 9))
return 0; return 0;
/* /*
......
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