Commit ea15f34d authored by Ashok Raj's avatar Ashok Raj Committed by Ilpo Järvinen

platform/x86/intel/ifs: Replace the exit rendezvous with an entry rendezvous for ARRAY_BIST

ARRAY_BIST requires the test to be invoked only from one of the HT
siblings of a core.  If the other sibling was in mwait(), that didn't
permit the test to complete and resulted in several retries before the
test could finish.

The exit rendezvous was introduced to keep the HT sibling busy until
the primary CPU completed the test to avoid those retries. What is
actually needed is to ensure that both the threads rendezvous *before*
the wrmsr to trigger the test to give good chance to complete the test.

The `stop_machine()` function returns only after all the CPUs complete
running the function, and provides an exit rendezvous implicitly.

In kernel/stop_machine.c::multi_cpu_stop(), every CPU in the mask
needs to complete reaching MULTI_STOP_RUN. When all CPUs complete, the
state machine moves to next state, i.e MULTI_STOP_EXIT. Thus the
underlying API stop_core_cpuslocked() already provides an exit
rendezvous.

Add the rendezvous earlier in order to ensure the wrmsr is triggered
after all CPUs reach the do_array_test(). Remove the exit rendezvous
since stop_core_cpuslocked() already guarantees that.
Signed-off-by: default avatarAshok Raj <ashok.raj@intel.com>
Reviewed-by: default avatarTony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20240125082254.424859-5-ashok.raj@intel.comReviewed-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
parent e272d1e1
......@@ -271,7 +271,7 @@ static void ifs_test_core(int cpu, struct device *dev)
}
#define SPINUNIT 100 /* 100 nsec */
static atomic_t array_cpus_out;
static atomic_t array_cpus_in;
/*
* Simplified cpu sibling rendezvous loop based on microcode loader __wait_for_cpus()
......@@ -298,6 +298,8 @@ static int do_array_test(void *data)
int cpu = smp_processor_id();
int first;
wait_for_sibling_cpu(&array_cpus_in, NSEC_PER_SEC);
/*
* Only one logical CPU on a core needs to trigger the Array test via MSR write.
*/
......@@ -309,9 +311,6 @@ static int do_array_test(void *data)
rdmsrl(MSR_ARRAY_BIST, command->data);
}
/* Tests complete faster if the sibling is spinning here */
wait_for_sibling_cpu(&array_cpus_out, NSEC_PER_SEC);
return 0;
}
......@@ -332,7 +331,7 @@ static void ifs_array_test_core(int cpu, struct device *dev)
timed_out = true;
break;
}
atomic_set(&array_cpus_out, 0);
atomic_set(&array_cpus_in, 0);
stop_core_cpuslocked(cpu, do_array_test, &command);
if (command.ctrl_result)
......
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