Commit ea6ff779 authored by Biju Das's avatar Biju Das Committed by Marc Kleine-Budde

can: rcar_canfd: Add multi_channel_irqs to struct rcar_canfd_hw_info

RZ/G2L has separate IRQ lines for tx and error interrupt for each
channel whereas R-Car has a combined IRQ line for all the channel
specific tx and error interrupts.

Add multi_channel_irqs to struct rcar_canfd_hw_info to select the
driver to choose between combined and separate irq registration for
channel interrupts. This patch also removes enum rcanfd_chip_id and
chip_id from both struct rcar_canfd_hw_info, as it is unused.
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/all/20221027082158.95895-6-biju.das.jz@bp.renesas.comSigned-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent a1dcfbdf
......@@ -41,12 +41,6 @@
#define RCANFD_DRV_NAME "rcar_canfd"
enum rcanfd_chip_id {
RENESAS_RCAR_GEN3 = 0,
RENESAS_RZG2L,
RENESAS_R8A779A0,
};
/* Global register bits */
/* RSCFDnCFDGRMCFG */
......@@ -523,11 +517,11 @@ enum rcar_canfd_fcanclk {
struct rcar_canfd_global;
struct rcar_canfd_hw_info {
enum rcanfd_chip_id chip_id;
u8 max_channels;
u8 postdiv;
/* hardware features */
unsigned shared_global_irqs:1; /* Has shared global irqs */
unsigned multi_channel_irqs:1; /* Has multiple channel irqs */
};
/* Channel priv data */
......@@ -598,20 +592,18 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = {
};
static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {
.chip_id = RENESAS_RCAR_GEN3,
.max_channels = 2,
.postdiv = 2,
.shared_global_irqs = 1,
};
static const struct rcar_canfd_hw_info rzg2l_hw_info = {
.chip_id = RENESAS_RZG2L,
.postdiv = 1,
.max_channels = 2,
.postdiv = 1,
.multi_channel_irqs = 1,
};
static const struct rcar_canfd_hw_info r8a779a0_hw_info = {
.chip_id = RENESAS_R8A779A0,
.max_channels = 8,
.postdiv = 2,
.shared_global_irqs = 1,
......@@ -1746,7 +1738,7 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,
priv->can.clock.freq = fcan_freq;
dev_info(&pdev->dev, "can_clk rate is %u\n", priv->can.clock.freq);
if (info->chip_id == RENESAS_RZG2L) {
if (info->multi_channel_irqs) {
char *irq_name;
int err_irq;
int tx_irq;
......
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