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Commit ea770789 authored by David Miller's avatar David Miller Committed by Paul Mundt
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svga: Make svga_wcrt_mask() take an iomem regbase pointer. 

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent d907ec04
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Showing with 93 additions and 93 deletions
drivers/video/arkfb.c
View file @ ea770789
...@@ -646,11 +646,11 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -646,11 +646,11 @@ static int arkfb_set_par(struct fb_info *info)
info->var.activate = FB_ACTIVATE_NOW; info->var.activate = FB_ACTIVATE_NOW;
/* Unlock registers */ /* Unlock registers */
svga_wcrt_mask(0x11, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80);
/* Blank screen and turn off sync */ /* Blank screen and turn off sync */
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
svga_wcrt_mask(0x17, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
/* Set default values */ /* Set default values */
svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_gfx_regs(par->state.vgabase);
...@@ -679,17 +679,17 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -679,17 +679,17 @@ static int arkfb_set_par(struct fb_info *info)
svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value);
/* fix for hi-res textmode */ /* fix for hi-res textmode */
svga_wcrt_mask(0x40, 0x08, 0x08); svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08);
if (info->var.vmode & FB_VMODE_DOUBLE) if (info->var.vmode & FB_VMODE_DOUBLE)
svga_wcrt_mask(0x09, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80);
else else
svga_wcrt_mask(0x09, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80);
if (info->var.vmode & FB_VMODE_INTERLACED) if (info->var.vmode & FB_VMODE_INTERLACED)
svga_wcrt_mask(0x44, 0x04, 0x04); svga_wcrt_mask(par->state.vgabase, 0x44, 0x04, 0x04);
else else
svga_wcrt_mask(0x44, 0x00, 0x04); svga_wcrt_mask(par->state.vgabase, 0x44, 0x00, 0x04);
hmul = 1; hmul = 1;
hdiv = 1; hdiv = 1;
...@@ -702,7 +702,7 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -702,7 +702,7 @@ static int arkfb_set_par(struct fb_info *info)
svga_set_textmode_vga_regs(); svga_set_textmode_vga_regs();
vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */
svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */
dac_set_mode(par->dac, DAC_PSEUDO8_8); dac_set_mode(par->dac, DAC_PSEUDO8_8);
break; break;
...@@ -711,14 +711,14 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -711,14 +711,14 @@ static int arkfb_set_par(struct fb_info *info)
vga_wgfx(NULL, VGA_GFX_MODE, 0x40); vga_wgfx(NULL, VGA_GFX_MODE, 0x40);
vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */
svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */
dac_set_mode(par->dac, DAC_PSEUDO8_8); dac_set_mode(par->dac, DAC_PSEUDO8_8);
break; break;
case 2: case 2:
pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node);
vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */ vga_wseq(NULL, 0x11, 0x10); /* basic VGA mode */
svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */
dac_set_mode(par->dac, DAC_PSEUDO8_8); dac_set_mode(par->dac, DAC_PSEUDO8_8);
break; break;
case 3: case 3:
...@@ -728,11 +728,11 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -728,11 +728,11 @@ static int arkfb_set_par(struct fb_info *info)
if (info->var.pixclock > 20000) { if (info->var.pixclock > 20000) {
pr_debug("fb%d: not using multiplex\n", info->node); pr_debug("fb%d: not using multiplex\n", info->node);
svga_wcrt_mask(0x46, 0x00, 0x04); /* 8bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x00, 0x04); /* 8bit pixel path */
dac_set_mode(par->dac, DAC_PSEUDO8_8); dac_set_mode(par->dac, DAC_PSEUDO8_8);
} else { } else {
pr_debug("fb%d: using multiplex\n", info->node); pr_debug("fb%d: using multiplex\n", info->node);
svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */
dac_set_mode(par->dac, DAC_PSEUDO8_16); dac_set_mode(par->dac, DAC_PSEUDO8_16);
hdiv = 2; hdiv = 2;
} }
...@@ -741,21 +741,21 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -741,21 +741,21 @@ static int arkfb_set_par(struct fb_info *info)
pr_debug("fb%d: 5/5/5 truecolor\n", info->node); pr_debug("fb%d: 5/5/5 truecolor\n", info->node);
vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */ vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */
svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */
dac_set_mode(par->dac, DAC_RGB1555_16); dac_set_mode(par->dac, DAC_RGB1555_16);
break; break;
case 5: case 5:
pr_debug("fb%d: 5/6/5 truecolor\n", info->node); pr_debug("fb%d: 5/6/5 truecolor\n", info->node);
vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */ vga_wseq(NULL, 0x11, 0x1A); /* 16bpp accel mode */
svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */
dac_set_mode(par->dac, DAC_RGB0565_16); dac_set_mode(par->dac, DAC_RGB0565_16);
break; break;
case 6: case 6:
pr_debug("fb%d: 8/8/8 truecolor\n", info->node); pr_debug("fb%d: 8/8/8 truecolor\n", info->node);
vga_wseq(NULL, 0x11, 0x16); /* 8bpp accel mode ??? */ vga_wseq(NULL, 0x11, 0x16); /* 8bpp accel mode ??? */
svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */
dac_set_mode(par->dac, DAC_RGB0888_16); dac_set_mode(par->dac, DAC_RGB0888_16);
hmul = 3; hmul = 3;
hdiv = 2; hdiv = 2;
...@@ -764,7 +764,7 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -764,7 +764,7 @@ static int arkfb_set_par(struct fb_info *info)
pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node);
vga_wseq(NULL, 0x11, 0x1E); /* 32bpp accel mode */ vga_wseq(NULL, 0x11, 0x1E); /* 32bpp accel mode */
svga_wcrt_mask(0x46, 0x04, 0x04); /* 16bit pixel path */ svga_wcrt_mask(par->state.vgabase, 0x46, 0x04, 0x04); /* 16bit pixel path */
dac_set_mode(par->dac, DAC_RGB8888_16); dac_set_mode(par->dac, DAC_RGB8888_16);
hmul = 2; hmul = 2;
break; break;
...@@ -786,7 +786,7 @@ static int arkfb_set_par(struct fb_info *info) ...@@ -786,7 +786,7 @@ static int arkfb_set_par(struct fb_info *info)
memset_io(info->screen_base, 0x00, screen_size); memset_io(info->screen_base, 0x00, screen_size);
/* Device and screen back on */ /* Device and screen back on */
svga_wcrt_mask(0x17, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80);
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
return 0; return 0;
...@@ -863,19 +863,19 @@ static int arkfb_blank(int blank_mode, struct fb_info *info) ...@@ -863,19 +863,19 @@ static int arkfb_blank(int blank_mode, struct fb_info *info)
case FB_BLANK_UNBLANK: case FB_BLANK_UNBLANK:
pr_debug("fb%d: unblank\n", info->node); pr_debug("fb%d: unblank\n", info->node);
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
svga_wcrt_mask(0x17, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80);
break; break;
case FB_BLANK_NORMAL: case FB_BLANK_NORMAL:
pr_debug("fb%d: blank\n", info->node); pr_debug("fb%d: blank\n", info->node);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
svga_wcrt_mask(0x17, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80);
break; break;
case FB_BLANK_POWERDOWN: case FB_BLANK_POWERDOWN:
case FB_BLANK_HSYNC_SUSPEND: case FB_BLANK_HSYNC_SUSPEND:
case FB_BLANK_VSYNC_SUSPEND: case FB_BLANK_VSYNC_SUSPEND:
pr_debug("fb%d: sync down\n", info->node); pr_debug("fb%d: sync down\n", info->node);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
svga_wcrt_mask(0x17, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
break; break;
} }
return 0; return 0;
......
drivers/video/s3fb.c
View file @ ea770789
...@@ -507,11 +507,11 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -507,11 +507,11 @@ static int s3fb_set_par(struct fb_info *info)
vga_wcrt(NULL, 0x38, 0x48); vga_wcrt(NULL, 0x38, 0x48);
vga_wcrt(NULL, 0x39, 0xA5); vga_wcrt(NULL, 0x39, 0xA5);
vga_wseq(NULL, 0x08, 0x06); vga_wseq(NULL, 0x08, 0x06);
svga_wcrt_mask(0x11, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80);
/* Blank screen and turn off sync */ /* Blank screen and turn off sync */
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
svga_wcrt_mask(0x17, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
/* Set default values */ /* Set default values */
svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_gfx_regs(par->state.vgabase);
...@@ -522,20 +522,20 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -522,20 +522,20 @@ static int s3fb_set_par(struct fb_info *info)
svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0); svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0);
/* S3 specific initialization */ /* S3 specific initialization */
svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ svga_wcrt_mask(par->state.vgabase, 0x58, 0x10, 0x10); /* enable linear framebuffer */
svga_wcrt_mask(0x31, 0x08, 0x08); /* enable sequencer access to framebuffer above 256 kB */ svga_wcrt_mask(par->state.vgabase, 0x31, 0x08, 0x08); /* enable sequencer access to framebuffer above 256 kB */
/* svga_wcrt_mask(0x33, 0x08, 0x08); */ /* DDR ? */ /* svga_wcrt_mask(par->state.vgabase, 0x33, 0x08, 0x08); */ /* DDR ? */
/* svga_wcrt_mask(0x43, 0x01, 0x01); */ /* DDR ? */ /* svga_wcrt_mask(par->state.vgabase, 0x43, 0x01, 0x01); */ /* DDR ? */
svga_wcrt_mask(0x33, 0x00, 0x08); /* no DDR ? */ svga_wcrt_mask(par->state.vgabase, 0x33, 0x00, 0x08); /* no DDR ? */
svga_wcrt_mask(0x43, 0x00, 0x01); /* no DDR ? */ svga_wcrt_mask(par->state.vgabase, 0x43, 0x00, 0x01); /* no DDR ? */
svga_wcrt_mask(0x5D, 0x00, 0x28); /* Clear strange HSlen bits */ svga_wcrt_mask(par->state.vgabase, 0x5D, 0x00, 0x28); /* Clear strange HSlen bits */
/* svga_wcrt_mask(0x58, 0x03, 0x03); */ /* svga_wcrt_mask(par->state.vgabase, 0x58, 0x03, 0x03); */
/* svga_wcrt_mask(0x53, 0x12, 0x13); */ /* enable MMIO */ /* svga_wcrt_mask(par->state.vgabase, 0x53, 0x12, 0x13); */ /* enable MMIO */
/* svga_wcrt_mask(0x40, 0x08, 0x08); */ /* enable write buffer */ /* svga_wcrt_mask(par->state.vgabase, 0x40, 0x08, 0x08); */ /* enable write buffer */
/* Set the offset register */ /* Set the offset register */
...@@ -555,19 +555,19 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -555,19 +555,19 @@ static int s3fb_set_par(struct fb_info *info)
svga_wattr(par->state.vgabase, 0x33, 0x00); svga_wattr(par->state.vgabase, 0x33, 0x00);
if (info->var.vmode & FB_VMODE_DOUBLE) if (info->var.vmode & FB_VMODE_DOUBLE)
svga_wcrt_mask(0x09, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80);
else else
svga_wcrt_mask(0x09, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80);
if (info->var.vmode & FB_VMODE_INTERLACED) if (info->var.vmode & FB_VMODE_INTERLACED)
svga_wcrt_mask(0x42, 0x20, 0x20); svga_wcrt_mask(par->state.vgabase, 0x42, 0x20, 0x20);
else else
svga_wcrt_mask(0x42, 0x00, 0x20); svga_wcrt_mask(par->state.vgabase, 0x42, 0x00, 0x20);
/* Disable hardware graphics cursor */ /* Disable hardware graphics cursor */
svga_wcrt_mask(0x45, 0x00, 0x01); svga_wcrt_mask(par->state.vgabase, 0x45, 0x00, 0x01);
/* Disable Streams engine */ /* Disable Streams engine */
svga_wcrt_mask(0x67, 0x00, 0x0C); svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0x0C);
mode = svga_match_format(s3fb_formats, &(info->var), &(info->fix)); mode = svga_match_format(s3fb_formats, &(info->var), &(info->fix));
...@@ -596,7 +596,7 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -596,7 +596,7 @@ static int s3fb_set_par(struct fb_info *info)
vga_wcrt(NULL, 0x66, 0x81); vga_wcrt(NULL, 0x66, 0x81);
} }
svga_wcrt_mask(0x31, 0x00, 0x40); svga_wcrt_mask(par->state.vgabase, 0x31, 0x00, 0x40);
multiplex = 0; multiplex = 0;
hmul = 1; hmul = 1;
...@@ -607,15 +607,15 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -607,15 +607,15 @@ static int s3fb_set_par(struct fb_info *info)
svga_set_textmode_vga_regs(); svga_set_textmode_vga_regs();
/* Set additional registers like in 8-bit mode */ /* Set additional registers like in 8-bit mode */
svga_wcrt_mask(0x50, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
svga_wcrt_mask(0x67, 0x00, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
/* Disable enhanced mode */ /* Disable enhanced mode */
svga_wcrt_mask(0x3A, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
if (fasttext) { if (fasttext) {
pr_debug("fb%d: high speed text mode set\n", info->node); pr_debug("fb%d: high speed text mode set\n", info->node);
svga_wcrt_mask(0x31, 0x40, 0x40); svga_wcrt_mask(par->state.vgabase, 0x31, 0x40, 0x40);
} }
break; break;
case 1: case 1:
...@@ -623,32 +623,32 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -623,32 +623,32 @@ static int s3fb_set_par(struct fb_info *info)
vga_wgfx(NULL, VGA_GFX_MODE, 0x40); vga_wgfx(NULL, VGA_GFX_MODE, 0x40);
/* Set additional registers like in 8-bit mode */ /* Set additional registers like in 8-bit mode */
svga_wcrt_mask(0x50, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
svga_wcrt_mask(0x67, 0x00, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
/* disable enhanced mode */ /* disable enhanced mode */
svga_wcrt_mask(0x3A, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
break; break;
case 2: case 2:
pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node);
/* Set additional registers like in 8-bit mode */ /* Set additional registers like in 8-bit mode */
svga_wcrt_mask(0x50, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
svga_wcrt_mask(0x67, 0x00, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
/* disable enhanced mode */ /* disable enhanced mode */
svga_wcrt_mask(0x3A, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x3A, 0x00, 0x30);
break; break;
case 3: case 3:
pr_debug("fb%d: 8 bit pseudocolor\n", info->node); pr_debug("fb%d: 8 bit pseudocolor\n", info->node);
svga_wcrt_mask(0x50, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x00, 0x30);
if (info->var.pixclock > 20000 || if (info->var.pixclock > 20000 ||
par->chip == CHIP_360_TRIO3D_1X || par->chip == CHIP_360_TRIO3D_1X ||
par->chip == CHIP_362_TRIO3D_2X || par->chip == CHIP_362_TRIO3D_2X ||
par->chip == CHIP_368_TRIO3D_2X) par->chip == CHIP_368_TRIO3D_2X)
svga_wcrt_mask(0x67, 0x00, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0);
else { else {
svga_wcrt_mask(0x67, 0x10, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x10, 0xF0);
multiplex = 1; multiplex = 1;
} }
break; break;
...@@ -656,12 +656,12 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -656,12 +656,12 @@ static int s3fb_set_par(struct fb_info *info)
pr_debug("fb%d: 5/5/5 truecolor\n", info->node); pr_debug("fb%d: 5/5/5 truecolor\n", info->node);
if (par->chip == CHIP_988_VIRGE_VX) { if (par->chip == CHIP_988_VIRGE_VX) {
if (info->var.pixclock > 20000) if (info->var.pixclock > 20000)
svga_wcrt_mask(0x67, 0x20, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x20, 0xF0);
else else
svga_wcrt_mask(0x67, 0x30, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);
} else { } else {
svga_wcrt_mask(0x50, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);
svga_wcrt_mask(0x67, 0x30, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x30, 0xF0);
if (par->chip != CHIP_360_TRIO3D_1X && if (par->chip != CHIP_360_TRIO3D_1X &&
par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_362_TRIO3D_2X &&
par->chip != CHIP_368_TRIO3D_2X) par->chip != CHIP_368_TRIO3D_2X)
...@@ -672,12 +672,12 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -672,12 +672,12 @@ static int s3fb_set_par(struct fb_info *info)
pr_debug("fb%d: 5/6/5 truecolor\n", info->node); pr_debug("fb%d: 5/6/5 truecolor\n", info->node);
if (par->chip == CHIP_988_VIRGE_VX) { if (par->chip == CHIP_988_VIRGE_VX) {
if (info->var.pixclock > 20000) if (info->var.pixclock > 20000)
svga_wcrt_mask(0x67, 0x40, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x40, 0xF0);
else else
svga_wcrt_mask(0x67, 0x50, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);
} else { } else {
svga_wcrt_mask(0x50, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x10, 0x30);
svga_wcrt_mask(0x67, 0x50, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0x50, 0xF0);
if (par->chip != CHIP_360_TRIO3D_1X && if (par->chip != CHIP_360_TRIO3D_1X &&
par->chip != CHIP_362_TRIO3D_2X && par->chip != CHIP_362_TRIO3D_2X &&
par->chip != CHIP_368_TRIO3D_2X) par->chip != CHIP_368_TRIO3D_2X)
...@@ -687,12 +687,12 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -687,12 +687,12 @@ static int s3fb_set_par(struct fb_info *info)
case 6: case 6:
/* VIRGE VX case */ /* VIRGE VX case */
pr_debug("fb%d: 8/8/8 truecolor\n", info->node); pr_debug("fb%d: 8/8/8 truecolor\n", info->node);
svga_wcrt_mask(0x67, 0xD0, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0);
break; break;
case 7: case 7:
pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node);
svga_wcrt_mask(0x50, 0x30, 0x30); svga_wcrt_mask(par->state.vgabase, 0x50, 0x30, 0x30);
svga_wcrt_mask(0x67, 0xD0, 0xF0); svga_wcrt_mask(par->state.vgabase, 0x67, 0xD0, 0xF0);
break; break;
default: default:
printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node); printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node);
...@@ -717,7 +717,7 @@ static int s3fb_set_par(struct fb_info *info) ...@@ -717,7 +717,7 @@ static int s3fb_set_par(struct fb_info *info)
memset_io(info->screen_base, 0x00, screen_size); memset_io(info->screen_base, 0x00, screen_size);
/* Device and screen back on */ /* Device and screen back on */
svga_wcrt_mask(0x17, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80);
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
return 0; return 0;
...@@ -793,27 +793,27 @@ static int s3fb_blank(int blank_mode, struct fb_info *info) ...@@ -793,27 +793,27 @@ static int s3fb_blank(int blank_mode, struct fb_info *info)
switch (blank_mode) { switch (blank_mode) {
case FB_BLANK_UNBLANK: case FB_BLANK_UNBLANK:
pr_debug("fb%d: unblank\n", info->node); pr_debug("fb%d: unblank\n", info->node);
svga_wcrt_mask(0x56, 0x00, 0x06); svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06);
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
break; break;
case FB_BLANK_NORMAL: case FB_BLANK_NORMAL:
pr_debug("fb%d: blank\n", info->node); pr_debug("fb%d: blank\n", info->node);
svga_wcrt_mask(0x56, 0x00, 0x06); svga_wcrt_mask(par->state.vgabase, 0x56, 0x00, 0x06);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
case FB_BLANK_HSYNC_SUSPEND: case FB_BLANK_HSYNC_SUSPEND:
pr_debug("fb%d: hsync\n", info->node); pr_debug("fb%d: hsync\n", info->node);
svga_wcrt_mask(0x56, 0x02, 0x06); svga_wcrt_mask(par->state.vgabase, 0x56, 0x02, 0x06);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
case FB_BLANK_VSYNC_SUSPEND: case FB_BLANK_VSYNC_SUSPEND:
pr_debug("fb%d: vsync\n", info->node); pr_debug("fb%d: vsync\n", info->node);
svga_wcrt_mask(0x56, 0x04, 0x06); svga_wcrt_mask(par->state.vgabase, 0x56, 0x04, 0x06);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
case FB_BLANK_POWERDOWN: case FB_BLANK_POWERDOWN:
pr_debug("fb%d: sync down\n", info->node); pr_debug("fb%d: sync down\n", info->node);
svga_wcrt_mask(0x56, 0x06, 0x06); svga_wcrt_mask(par->state.vgabase, 0x56, 0x06, 0x06);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
} }
......
drivers/video/svgalib.c
View file @ ea770789
...@@ -130,9 +130,9 @@ void svga_set_default_seq_regs(void __iomem *regbase) ...@@ -130,9 +130,9 @@ void svga_set_default_seq_regs(void __iomem *regbase)
void svga_set_default_crt_regs(void) void svga_set_default_crt_regs(void)
{ {
/* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */ /* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */
svga_wcrt_mask(0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ svga_wcrt_mask(NULL, 0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */
vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0); vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0);
svga_wcrt_mask(VGA_CRTC_MAX_SCAN, 0, 0x1F); svga_wcrt_mask(NULL, VGA_CRTC_MAX_SCAN, 0, 0x1F);
vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0); vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0);
vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3); vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3);
} }
...@@ -145,7 +145,7 @@ void svga_set_textmode_vga_regs(void) ...@@ -145,7 +145,7 @@ void svga_set_textmode_vga_regs(void)
vga_wcrt(NULL, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ vga_wcrt(NULL, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */
vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0x1f); vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0x1f);
svga_wcrt_mask(VGA_CRTC_MODE, 0x23, 0x7f); svga_wcrt_mask(NULL, VGA_CRTC_MODE, 0x23, 0x7f);
vga_wcrt(NULL, VGA_CRTC_CURSOR_START, 0x0d); vga_wcrt(NULL, VGA_CRTC_CURSOR_START, 0x0d);
vga_wcrt(NULL, VGA_CRTC_CURSOR_END, 0x0e); vga_wcrt(NULL, VGA_CRTC_CURSOR_END, 0x0e);
...@@ -310,7 +310,7 @@ void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) ...@@ -310,7 +310,7 @@ void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor)
if (! cursor -> mode) if (! cursor -> mode)
return; return;
svga_wcrt_mask(0x0A, 0x20, 0x20); /* disable cursor */ svga_wcrt_mask(NULL, 0x0A, 0x20, 0x20); /* disable cursor */
if (cursor -> shape == FB_TILE_CURSOR_NONE) if (cursor -> shape == FB_TILE_CURSOR_NONE)
return; return;
......
drivers/video/vt8623fb.c
View file @ ea770789
...@@ -417,13 +417,13 @@ static int vt8623fb_set_par(struct fb_info *info) ...@@ -417,13 +417,13 @@ static int vt8623fb_set_par(struct fb_info *info)
/* Unlock registers */ /* Unlock registers */
svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01);
svga_wcrt_mask(0x11, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80);
svga_wcrt_mask(0x47, 0x00, 0x01); svga_wcrt_mask(par->state.vgabase, 0x47, 0x00, 0x01);
/* Device, screen and sync off */ /* Device, screen and sync off */
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
svga_wcrt_mask(0x36, 0x30, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30);
svga_wcrt_mask(0x17, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x00, 0x80);
/* Set default values */ /* Set default values */
svga_set_default_gfx_regs(par->state.vgabase); svga_set_default_gfx_regs(par->state.vgabase);
...@@ -437,13 +437,13 @@ static int vt8623fb_set_par(struct fb_info *info) ...@@ -437,13 +437,13 @@ static int vt8623fb_set_par(struct fb_info *info)
svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value); svga_wseq_multi(par->state.vgabase, vt8623_fetch_count_regs, fetch_value);
/* Clear H/V Skew */ /* Clear H/V Skew */
svga_wcrt_mask(0x03, 0x00, 0x60); svga_wcrt_mask(par->state.vgabase, 0x03, 0x00, 0x60);
svga_wcrt_mask(0x05, 0x00, 0x60); svga_wcrt_mask(par->state.vgabase, 0x05, 0x00, 0x60);
if (info->var.vmode & FB_VMODE_DOUBLE) if (info->var.vmode & FB_VMODE_DOUBLE)
svga_wcrt_mask(0x09, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x09, 0x80, 0x80);
else else
svga_wcrt_mask(0x09, 0x00, 0x80); svga_wcrt_mask(par->state.vgabase, 0x09, 0x00, 0x80);
svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus svga_wseq_mask(par->state.vgabase, 0x1E, 0xF0, 0xF0); // DI/DVP bus
svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus svga_wseq_mask(par->state.vgabase, 0x2A, 0x0F, 0x0F); // DI/DVP bus
...@@ -468,18 +468,18 @@ static int vt8623fb_set_par(struct fb_info *info) ...@@ -468,18 +468,18 @@ static int vt8623fb_set_par(struct fb_info *info)
pr_debug("fb%d: text mode\n", info->node); pr_debug("fb%d: text mode\n", info->node);
svga_set_textmode_vga_regs(); svga_set_textmode_vga_regs();
svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE);
svga_wcrt_mask(0x11, 0x60, 0x70); svga_wcrt_mask(par->state.vgabase, 0x11, 0x60, 0x70);
break; break;
case 1: case 1:
pr_debug("fb%d: 4 bit pseudocolor\n", info->node); pr_debug("fb%d: 4 bit pseudocolor\n", info->node);
vga_wgfx(NULL, VGA_GFX_MODE, 0x40); vga_wgfx(NULL, VGA_GFX_MODE, 0x40);
svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE); svga_wseq_mask(par->state.vgabase, 0x15, 0x20, 0xFE);
svga_wcrt_mask(0x11, 0x00, 0x70); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70);
break; break;
case 2: case 2:
pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node);
svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE); svga_wseq_mask(par->state.vgabase, 0x15, 0x00, 0xFE);
svga_wcrt_mask(0x11, 0x00, 0x70); svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x70);
break; break;
case 3: case 3:
pr_debug("fb%d: 8 bit pseudocolor\n", info->node); pr_debug("fb%d: 8 bit pseudocolor\n", info->node);
...@@ -506,8 +506,8 @@ static int vt8623fb_set_par(struct fb_info *info) ...@@ -506,8 +506,8 @@ static int vt8623fb_set_par(struct fb_info *info)
memset_io(info->screen_base, 0x00, screen_size); memset_io(info->screen_base, 0x00, screen_size);
/* Device and screen back on */ /* Device and screen back on */
svga_wcrt_mask(0x17, 0x80, 0x80); svga_wcrt_mask(par->state.vgabase, 0x17, 0x80, 0x80);
svga_wcrt_mask(0x36, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30);
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
return 0; return 0;
...@@ -576,27 +576,27 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info) ...@@ -576,27 +576,27 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info)
switch (blank_mode) { switch (blank_mode) {
case FB_BLANK_UNBLANK: case FB_BLANK_UNBLANK:
pr_debug("fb%d: unblank\n", info->node); pr_debug("fb%d: unblank\n", info->node);
svga_wcrt_mask(0x36, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30);
svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20);
break; break;
case FB_BLANK_NORMAL: case FB_BLANK_NORMAL:
pr_debug("fb%d: blank\n", info->node); pr_debug("fb%d: blank\n", info->node);
svga_wcrt_mask(0x36, 0x00, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
case FB_BLANK_HSYNC_SUSPEND: case FB_BLANK_HSYNC_SUSPEND:
pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); pr_debug("fb%d: DPMS standby (hsync off)\n", info->node);
svga_wcrt_mask(0x36, 0x10, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x10, 0x30);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
case FB_BLANK_VSYNC_SUSPEND: case FB_BLANK_VSYNC_SUSPEND:
pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node);
svga_wcrt_mask(0x36, 0x20, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x20, 0x30);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
case FB_BLANK_POWERDOWN: case FB_BLANK_POWERDOWN:
pr_debug("fb%d: DPMS off (no sync)\n", info->node); pr_debug("fb%d: DPMS off (no sync)\n", info->node);
svga_wcrt_mask(0x36, 0x30, 0x30); svga_wcrt_mask(par->state.vgabase, 0x36, 0x30, 0x30);
svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20); svga_wseq_mask(par->state.vgabase, 0x01, 0x20, 0x20);
break; break;
} }
......
include/linux/svga.h
View file @ ea770789
...@@ -83,9 +83,9 @@ static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 m ...@@ -83,9 +83,9 @@ static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 m
/* Write a value to a CRT register with a mask */ /* Write a value to a CRT register with a mask */
static inline void svga_wcrt_mask(u8 index, u8 data, u8 mask) static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
{ {
vga_wcrt(NULL, index, (data & mask) | (vga_rcrt(NULL, index) & ~mask)); vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask));
} }
static inline int svga_primary_device(struct pci_dev *dev) static inline int svga_primary_device(struct pci_dev *dev)
......
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