Commit eaa3a1d4 authored by Borislav Petkov's avatar Borislav Petkov

EDAC, ghes: Make platform-based whitelisting x86-only

ARM machines all have DMI tables so if they request hw error reporting
through GHES, then the driver should be able to detect DIMMs and report
errors successfully (famous last words :)).

Make the platform-based list x86-specific so that ghes_edac can load on
ARM.
Reported-by: default avatarQiang Zheng <zhengqiang10@huawei.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarJames Morse <james.morse@arm.com>
Tested-by: default avatarJames Morse <james.morse@arm.com>
Tested-by: default avatarQiang Zheng <zhengqiang10@huawei.com>
Link: https://lkml.kernel.org/r/1526039543-180996-1-git-send-email-zhengqiang10@huawei.com
parent 9ef20753
...@@ -440,12 +440,16 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev) ...@@ -440,12 +440,16 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
struct mem_ctl_info *mci; struct mem_ctl_info *mci;
struct edac_mc_layer layers[1]; struct edac_mc_layer layers[1];
struct ghes_edac_dimm_fill dimm_fill; struct ghes_edac_dimm_fill dimm_fill;
int idx; int idx = -1;
/* Check if safe to enable on this system */ if (IS_ENABLED(CONFIG_X86)) {
idx = acpi_match_platform_list(plat_list); /* Check if safe to enable on this system */
if (!force_load && idx < 0) idx = acpi_match_platform_list(plat_list);
return -ENODEV; if (!force_load && idx < 0)
return -ENODEV;
} else {
idx = 0;
}
/* /*
* We have only one logical memory controller to which all DIMMs belong. * We have only one logical memory controller to which all DIMMs belong.
......
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