Commit eaf963b5 authored by Kevin Wang's avatar Kevin Wang Committed by Alex Deucher

drm/amd/powerplay: add socclk profile dpm support.

1.miss socclk profile support when bringup.
2.add feature check for socclk.
Signed-off-by: default avatarKevin Wang <kevin1.wang@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 75ee6487
...@@ -149,6 +149,11 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, ...@@ -149,6 +149,11 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
pr_warn("gfxclk dpm is not enabled\n"); pr_warn("gfxclk dpm is not enabled\n");
return 0; return 0;
} }
case SMU_SOCCLK:
if (!smu_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
pr_warn("sockclk dpm is not enabled\n");
return 0;
}
break; break;
default: default:
break; break;
...@@ -1388,6 +1393,7 @@ int smu_adjust_power_state_dynamic(struct smu_context *smu, ...@@ -1388,6 +1393,7 @@ int smu_adjust_power_state_dynamic(struct smu_context *smu,
return ret; return ret;
smu_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask); smu_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask);
smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask); smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask);
smu_force_clk_levels(smu, SMU_SOCCLK, 1 << soc_mask);
break; break;
case AMD_DPM_FORCED_LEVEL_MANUAL: case AMD_DPM_FORCED_LEVEL_MANUAL:
......
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