Commit ebba638a authored by Kees Cook's avatar Kees Cook Committed by H. Peter Anvin

x86, cpu: Call verify_cpu during 32bit CPU startup

The XD_DISABLE-clearing side-effect needs to happen for both 32bit
and 64bit, but the 32bit init routines were not calling verify_cpu()
yet. This adds that call to gain the side-effect.

The longmode/SSE tests being performed in verify_cpu() need to happen very
early for 64bit but not for 32bit. Instead of including it in two places
for 32bit, we can just include it once in arch/x86/kernel/head_32.S.
Signed-off-by: default avatarKees Cook <kees.cook@canonical.com>
LKML-Reference: <1289414154-7829-4-git-send-email-kees.cook@canonical.com>
Acked-by: default avatarPekka Enberg <penberg@kernel.org>
Acked-by: default avatarAlan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent ae84739c
...@@ -314,6 +314,10 @@ ENTRY(startup_32_smp) ...@@ -314,6 +314,10 @@ ENTRY(startup_32_smp)
subl $0x80000001, %eax subl $0x80000001, %eax
cmpl $(0x8000ffff-0x80000001), %eax cmpl $(0x8000ffff-0x80000001), %eax
ja 6f ja 6f
/* Clear bogus XD_DISABLE bits */
call verify_cpu
mov $0x80000001, %eax mov $0x80000001, %eax
cpuid cpuid
/* Execute Disable bit supported? */ /* Execute Disable bit supported? */
...@@ -609,6 +613,8 @@ ignore_int: ...@@ -609,6 +613,8 @@ ignore_int:
#endif #endif
iret iret
#include "verify_cpu.S"
__REFDATA __REFDATA
.align 4 .align 4
ENTRY(initial_code) ENTRY(initial_code)
......
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
* *
* arch/x86_64/boot/compressed/head_64.S: Boot cpu verification * arch/x86_64/boot/compressed/head_64.S: Boot cpu verification
* arch/x86_64/kernel/trampoline_64.S: secondary processor verfication * arch/x86_64/kernel/trampoline_64.S: secondary processor verfication
* arch/x86_64/kernel/head_32.S: processor startup
* *
* verify_cpu, returns the status of longmode and SSE in register %eax. * verify_cpu, returns the status of longmode and SSE in register %eax.
* 0: Success 1: Failure * 0: Success 1: Failure
......
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