Commit ecc6a239 authored by Anjali Singhai Jain's avatar Anjali Singhai Jain Committed by Jeff Kirsher

i40e: Refactor force_wb and WB_ON_ITR functionality code

Now that the Force-WriteBack functionality in X710/XL710 devices
has been moved out of the clean routine and into the service task,
we need to make sure WriteBack-On-ITR is separated out since it
is still called from clean.

In the X722 devices, Force-WriteBack implies WriteBack-On-ITR but
without the interrupt, which put the driver into a missed
interrupt scenario and a potential tx-timeout report.

With this patch, we break the two functions out, and call the
appropriate ones at the right place. This will avoid creating missed
interrupt like scenarios for X722 devices.

Also update copyright year in file headers.

Change-ID: Iacbde39f95f332f82be8736864675052c3583a40
Signed-off-by: default avatarAnjali Singhai Jain <anjali.singhai@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 66fc360a
/******************************************************************************* /*******************************************************************************
* *
* Intel Ethernet Controller XL710 Family Linux Driver * Intel Ethernet Controller XL710 Family Linux Driver
* Copyright(c) 2013 - 2014 Intel Corporation. * Copyright(c) 2013 - 2016 Intel Corporation.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
...@@ -774,37 +774,48 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget) ...@@ -774,37 +774,48 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget)
} }
/** /**
* i40e_force_wb - Arm hardware to do a wb on noncache aligned descriptors * i40e_enable_wb_on_itr - Arm hardware to do a wb, interrupts are not enabled
* @vsi: the VSI we care about * @vsi: the VSI we care about
* @q_vector: the vector on which to force writeback * @q_vector: the vector on which to enable writeback
* *
**/ **/
void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector) static void i40e_enable_wb_on_itr(struct i40e_vsi *vsi,
struct i40e_q_vector *q_vector)
{ {
u16 flags = q_vector->tx.ring[0].flags; u16 flags = q_vector->tx.ring[0].flags;
u32 val;
if (flags & I40E_TXR_FLAGS_WB_ON_ITR) { if (!(flags & I40E_TXR_FLAGS_WB_ON_ITR))
u32 val; return;
if (q_vector->arm_wb_state) if (q_vector->arm_wb_state)
return; return;
if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK | val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK |
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */ I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */
wr32(&vsi->back->hw, wr32(&vsi->back->hw,
I40E_PFINT_DYN_CTLN(q_vector->v_idx + I40E_PFINT_DYN_CTLN(q_vector->v_idx + vsi->base_vector - 1),
vsi->base_vector - 1), val);
val); } else {
} else { val = I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK |
val = I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK | I40E_PFINT_DYN_CTL0_ITR_INDX_MASK; /* set noitr */
I40E_PFINT_DYN_CTL0_ITR_INDX_MASK; /* set noitr */
wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, val); wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, val);
} }
q_vector->arm_wb_state = true; q_vector->arm_wb_state = true;
} else if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { }
/**
* i40e_force_wb - Issue SW Interrupt so HW does a wb
* @vsi: the VSI we care about
* @q_vector: the vector on which to force writeback
*
**/
void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
{
if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
u32 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | u32 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | /* set noitr */ I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | /* set noitr */
I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK | I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
...@@ -1946,7 +1957,7 @@ int i40e_napi_poll(struct napi_struct *napi, int budget) ...@@ -1946,7 +1957,7 @@ int i40e_napi_poll(struct napi_struct *napi, int budget)
tx_only: tx_only:
if (arm_wb) { if (arm_wb) {
q_vector->tx.ring[0].tx_stats.tx_force_wb++; q_vector->tx.ring[0].tx_stats.tx_force_wb++;
i40e_force_wb(vsi, q_vector); i40e_enable_wb_on_itr(vsi, q_vector);
} }
return budget; return budget;
} }
......
/******************************************************************************* /*******************************************************************************
* *
* Intel Ethernet Controller XL710 Family Linux Virtual Function Driver * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
* Copyright(c) 2013 - 2014 Intel Corporation. * Copyright(c) 2013 - 2016 Intel Corporation.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
...@@ -292,40 +292,49 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget) ...@@ -292,40 +292,49 @@ static bool i40e_clean_tx_irq(struct i40e_ring *tx_ring, int budget)
} }
/** /**
* i40evf_force_wb -Arm hardware to do a wb on noncache aligned descriptors * i40evf_enable_wb_on_itr - Arm hardware to do a wb, interrupts are not enabled
* @vsi: the VSI we care about * @vsi: the VSI we care about
* @q_vector: the vector on which to force writeback * @q_vector: the vector on which to enable writeback
* *
**/ **/
static void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector) static void i40e_enable_wb_on_itr(struct i40e_vsi *vsi,
struct i40e_q_vector *q_vector)
{ {
u16 flags = q_vector->tx.ring[0].flags; u16 flags = q_vector->tx.ring[0].flags;
u32 val;
if (flags & I40E_TXR_FLAGS_WB_ON_ITR) { if (!(flags & I40E_TXR_FLAGS_WB_ON_ITR))
u32 val; return;
if (q_vector->arm_wb_state) if (q_vector->arm_wb_state)
return; return;
val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK | val = I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK |
I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK; /* set noitr */ I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK; /* set noitr */
wr32(&vsi->back->hw, wr32(&vsi->back->hw,
I40E_VFINT_DYN_CTLN1(q_vector->v_idx + I40E_VFINT_DYN_CTLN1(q_vector->v_idx +
vsi->base_vector - 1), vsi->base_vector - 1), val);
val); q_vector->arm_wb_state = true;
q_vector->arm_wb_state = true; }
} else {
u32 val = I40E_VFINT_DYN_CTLN1_INTENA_MASK | /**
I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK | /* set noitr */ * i40evf_force_wb - Issue SW Interrupt so HW does a wb
I40E_VFINT_DYN_CTLN1_SWINT_TRIG_MASK | * @vsi: the VSI we care about
I40E_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_MASK; * @q_vector: the vector on which to force writeback
/* allow 00 to be written to the index */ *
**/
wr32(&vsi->back->hw, void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
I40E_VFINT_DYN_CTLN1(q_vector->v_idx + {
vsi->base_vector - 1), val); u32 val = I40E_VFINT_DYN_CTLN1_INTENA_MASK |
} I40E_VFINT_DYN_CTLN1_ITR_INDX_MASK | /* set noitr */
I40E_VFINT_DYN_CTLN1_SWINT_TRIG_MASK |
I40E_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_MASK
/* allow 00 to be written to the index */;
wr32(&vsi->back->hw,
I40E_VFINT_DYN_CTLN1(q_vector->v_idx + vsi->base_vector - 1),
val);
} }
/** /**
...@@ -1384,7 +1393,7 @@ int i40evf_napi_poll(struct napi_struct *napi, int budget) ...@@ -1384,7 +1393,7 @@ int i40evf_napi_poll(struct napi_struct *napi, int budget)
tx_only: tx_only:
if (arm_wb) { if (arm_wb) {
q_vector->tx.ring[0].tx_stats.tx_force_wb++; q_vector->tx.ring[0].tx_stats.tx_force_wb++;
i40evf_force_wb(vsi, q_vector); i40e_enable_wb_on_itr(vsi, q_vector);
} }
return budget; return budget;
} }
......
/******************************************************************************* /*******************************************************************************
* *
* Intel Ethernet Controller XL710 Family Linux Virtual Function Driver * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
* Copyright(c) 2013 - 2014 Intel Corporation. * Copyright(c) 2013 - 2016 Intel Corporation.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
...@@ -324,6 +324,7 @@ int i40evf_setup_rx_descriptors(struct i40e_ring *rx_ring); ...@@ -324,6 +324,7 @@ int i40evf_setup_rx_descriptors(struct i40e_ring *rx_ring);
void i40evf_free_tx_resources(struct i40e_ring *tx_ring); void i40evf_free_tx_resources(struct i40e_ring *tx_ring);
void i40evf_free_rx_resources(struct i40e_ring *rx_ring); void i40evf_free_rx_resources(struct i40e_ring *rx_ring);
int i40evf_napi_poll(struct napi_struct *napi, int budget); int i40evf_napi_poll(struct napi_struct *napi, int budget);
void i40evf_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector);
u32 i40evf_get_tx_pending(struct i40e_ring *ring); u32 i40evf_get_tx_pending(struct i40e_ring *ring);
/** /**
......
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