Commit ecd755fb authored by Lubomir Rintel's avatar Lubomir Rintel Committed by Greg Kroah-Hartman

ARM: dts: mmp*: Make the serial ports compatible with xscale-uart

XScale serial port driver is perfectly capable of supporting this hardware. A
separate compatible string is probably a historical mess.
Signed-off-by: default avatarLubomir Rintel <lkundrak@v3.sk>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-7-lkundrak@v3.skSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c10419f9
...@@ -209,7 +209,7 @@ timer0: timer@d4014000 { ...@@ -209,7 +209,7 @@ timer0: timer@d4014000 {
}; };
uart1: serial@d4030000 { uart1: serial@d4030000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4030000 0x1000>; reg = <0xd4030000 0x1000>;
interrupts = <27>; interrupts = <27>;
clocks = <&soc_clocks MMP2_CLK_UART0>; clocks = <&soc_clocks MMP2_CLK_UART0>;
...@@ -219,7 +219,7 @@ uart1: serial@d4030000 { ...@@ -219,7 +219,7 @@ uart1: serial@d4030000 {
}; };
uart2: serial@d4017000 { uart2: serial@d4017000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4017000 0x1000>; reg = <0xd4017000 0x1000>;
interrupts = <28>; interrupts = <28>;
clocks = <&soc_clocks MMP2_CLK_UART1>; clocks = <&soc_clocks MMP2_CLK_UART1>;
...@@ -229,7 +229,7 @@ uart2: serial@d4017000 { ...@@ -229,7 +229,7 @@ uart2: serial@d4017000 {
}; };
uart3: serial@d4018000 { uart3: serial@d4018000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4018000 0x1000>; reg = <0xd4018000 0x1000>;
interrupts = <24>; interrupts = <24>;
clocks = <&soc_clocks MMP2_CLK_UART2>; clocks = <&soc_clocks MMP2_CLK_UART2>;
...@@ -239,7 +239,7 @@ uart3: serial@d4018000 { ...@@ -239,7 +239,7 @@ uart3: serial@d4018000 {
}; };
uart4: serial@d4016000 { uart4: serial@d4016000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4016000 0x1000>; reg = <0xd4016000 0x1000>;
interrupts = <46>; interrupts = <46>;
clocks = <&soc_clocks MMP2_CLK_UART3>; clocks = <&soc_clocks MMP2_CLK_UART3>;
......
...@@ -319,7 +319,7 @@ timer: timer@d4014000 { ...@@ -319,7 +319,7 @@ timer: timer@d4014000 {
}; };
uart1: serial@d4030000 { uart1: serial@d4030000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4030000 0x1000>; reg = <0xd4030000 0x1000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_UART0>; clocks = <&soc_clocks MMP2_CLK_UART0>;
...@@ -329,7 +329,7 @@ uart1: serial@d4030000 { ...@@ -329,7 +329,7 @@ uart1: serial@d4030000 {
}; };
uart2: serial@d4017000 { uart2: serial@d4017000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4017000 0x1000>; reg = <0xd4017000 0x1000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_UART1>; clocks = <&soc_clocks MMP2_CLK_UART1>;
...@@ -339,7 +339,7 @@ uart2: serial@d4017000 { ...@@ -339,7 +339,7 @@ uart2: serial@d4017000 {
}; };
uart3: serial@d4018000 { uart3: serial@d4018000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4018000 0x1000>; reg = <0xd4018000 0x1000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_UART2>; clocks = <&soc_clocks MMP2_CLK_UART2>;
...@@ -349,7 +349,7 @@ uart3: serial@d4018000 { ...@@ -349,7 +349,7 @@ uart3: serial@d4018000 {
}; };
uart4: serial@d4016000 { uart4: serial@d4016000 {
compatible = "mrvl,mmp-uart"; compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0xd4016000 0x1000>; reg = <0xd4016000 0x1000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&soc_clocks MMP2_CLK_UART3>; clocks = <&soc_clocks MMP2_CLK_UART3>;
......
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