Commit ed3e80c4 authored by Mark Brown's avatar Mark Brown

ASoC: Ensure WM8731 register cache is synced when resuming from disabled

Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
parent 1d9a91db
......@@ -453,6 +453,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
snd_soc_write(codec, WM8731_PWR, 0xffff);
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
wm8731->supplies);
codec->cache_sync = 1;
break;
}
codec->dapm.bias_level = level;
......
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