Commit eda308be authored by Ajay Singh's avatar Ajay Singh Committed by Greg Kroah-Hartman

staging: wilc1000: refactor interrupt handling for sdio

Make use of FIELD_PREP/FIELD_GET macro to refactor the interrupt
handling for SDIO.
Signed-off-by: default avatarAjay Singh <ajay.kathat@microchip.com>
Link: https://lore.kernel.org/r/20200214172250.13026-4-ajay.kathat@microchip.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 759af9b8
...@@ -26,7 +26,6 @@ static const struct sdio_device_id wilc_sdio_ids[] = { ...@@ -26,7 +26,6 @@ static const struct sdio_device_id wilc_sdio_ids[] = {
struct wilc_sdio { struct wilc_sdio {
bool irq_gpio; bool irq_gpio;
u32 block_size; u32 block_size;
int nint;
int has_thrpt_enh3; int has_thrpt_enh3;
}; };
...@@ -790,6 +789,7 @@ static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status) ...@@ -790,6 +789,7 @@ static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status)
struct sdio_func *func = dev_to_sdio_func(wilc->dev); struct sdio_func *func = dev_to_sdio_func(wilc->dev);
struct wilc_sdio *sdio_priv = wilc->bus_data; struct wilc_sdio *sdio_priv = wilc->bus_data;
u32 tmp; u32 tmp;
u8 irq_flags;
struct sdio_cmd52 cmd; struct sdio_cmd52 cmd;
wilc_sdio_read_size(wilc, &tmp); wilc_sdio_read_size(wilc, &tmp);
...@@ -798,44 +798,22 @@ static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status) ...@@ -798,44 +798,22 @@ static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status)
* Read IRQ flags * Read IRQ flags
**/ **/
if (!sdio_priv->irq_gpio) { if (!sdio_priv->irq_gpio) {
int i;
cmd.read_write = 0;
cmd.function = 1; cmd.function = 1;
cmd.address = 0x04; cmd.address = 0x04;
cmd.data = 0;
wilc_sdio_cmd52(wilc, &cmd);
if (cmd.data & BIT(0))
tmp |= INT_0;
if (cmd.data & BIT(2))
tmp |= INT_1;
if (cmd.data & BIT(3))
tmp |= INT_2;
if (cmd.data & BIT(4))
tmp |= INT_3;
if (cmd.data & BIT(5))
tmp |= INT_4;
for (i = sdio_priv->nint; i < MAX_NUM_INT; i++) {
if ((tmp >> (IRG_FLAGS_OFFSET + i)) & 0x1) {
dev_err(&func->dev,
"Unexpected interrupt (1) : tmp=%x, data=%x\n",
tmp, cmd.data);
break;
}
}
} else { } else {
u32 irq_flags;
cmd.read_write = 0;
cmd.function = 0; cmd.function = 0;
cmd.raw = 0;
cmd.address = 0xf7; cmd.address = 0xf7;
cmd.data = 0;
wilc_sdio_cmd52(wilc, &cmd);
irq_flags = cmd.data & 0x1f;
tmp |= ((irq_flags >> 0) << IRG_FLAGS_OFFSET);
} }
cmd.raw = 0;
cmd.read_write = 0;
cmd.data = 0;
wilc_sdio_cmd52(wilc, &cmd);
irq_flags = cmd.data;
tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data);
if (FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags))
dev_err(&func->dev, "Unexpected interrupt (1) int=%lx\n",
FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags));
*int_status = tmp; *int_status = tmp;
...@@ -890,38 +868,36 @@ static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val) ...@@ -890,38 +868,36 @@ static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val)
* Must clear each interrupt individually. * Must clear each interrupt individually.
*/ */
u32 flags; u32 flags;
int i;
flags = val & (BIT(MAX_NUM_INT) - 1); flags = val & (BIT(MAX_NUM_INT) - 1);
if (flags) { for (i = 0; i < NUM_INT_EXT && flags; i++) {
int i; if (flags & BIT(i)) {
struct sdio_cmd52 cmd;
for (i = 0; i < sdio_priv->nint; i++) {
if (flags & 1) { cmd.read_write = 1;
struct sdio_cmd52 cmd; cmd.function = 0;
cmd.raw = 0;
cmd.read_write = 1; cmd.address = 0xf8;
cmd.function = 0; cmd.data = BIT(i);
cmd.raw = 0;
cmd.address = 0xf8; ret = wilc_sdio_cmd52(wilc, &cmd);
cmd.data = BIT(i); if (ret) {
dev_err(&func->dev,
ret = wilc_sdio_cmd52(wilc, &cmd); "Failed cmd52, set 0xf8 data (%d) ...\n",
if (ret) { __LINE__);
dev_err(&func->dev, return ret;
"Failed cmd52, set 0xf8 data (%d) ...\n",
__LINE__);
return ret;
}
} }
flags >>= 1; flags &= ~BIT(i);
} }
}
for (i = sdio_priv->nint; i < MAX_NUM_INT; i++) { for (i = NUM_INT_EXT; i < MAX_NUM_INT && flags; i++) {
if (flags & 1) if (flags & BIT(i)) {
dev_err(&func->dev, dev_err(&func->dev,
"Unexpected interrupt cleared %d...\n", "Unexpected interrupt cleared %d...\n",
i); i);
flags >>= 1; flags &= ~BIT(i);
} }
} }
} }
...@@ -967,8 +943,6 @@ static int wilc_sdio_sync_ext(struct wilc *wilc, int nint) ...@@ -967,8 +943,6 @@ static int wilc_sdio_sync_ext(struct wilc *wilc, int nint)
return -EINVAL; return -EINVAL;
} }
sdio_priv->nint = nint;
/** /**
* Disable power sequencer * Disable power sequencer
**/ **/
......
...@@ -12,7 +12,6 @@ ...@@ -12,7 +12,6 @@
struct wilc_spi { struct wilc_spi {
int crc_off; int crc_off;
int nint;
}; };
static const struct wilc_hif_func wilc_hif_spi; static const struct wilc_hif_func wilc_hif_spi;
...@@ -916,7 +915,6 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) ...@@ -916,7 +915,6 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val)
static int wilc_spi_sync_ext(struct wilc *wilc, int nint) static int wilc_spi_sync_ext(struct wilc *wilc, int nint)
{ {
struct spi_device *spi = to_spi_device(wilc->dev); struct spi_device *spi = to_spi_device(wilc->dev);
struct wilc_spi *spi_priv = wilc->bus_data;
u32 reg; u32 reg;
int ret, i; int ret, i;
...@@ -925,8 +923,6 @@ static int wilc_spi_sync_ext(struct wilc *wilc, int nint) ...@@ -925,8 +923,6 @@ static int wilc_spi_sync_ext(struct wilc *wilc, int nint)
return -EINVAL; return -EINVAL;
} }
spi_priv->nint = nint;
/* /*
* interrupt pin mux select * interrupt pin mux select
*/ */
......
...@@ -176,6 +176,8 @@ ...@@ -176,6 +176,8 @@
#define INT_4 BIT(IRG_FLAGS_OFFSET + 4) #define INT_4 BIT(IRG_FLAGS_OFFSET + 4)
#define INT_5 BIT(IRG_FLAGS_OFFSET + 5) #define INT_5 BIT(IRG_FLAGS_OFFSET + 5)
#define MAX_NUM_INT 5 #define MAX_NUM_INT 5
#define IRG_FLAGS_MASK GENMASK(IRG_FLAGS_OFFSET + MAX_NUM_INT, \
IRG_FLAGS_OFFSET)
/*******************************************/ /*******************************************/
/* E0 and later Interrupt flags. */ /* E0 and later Interrupt flags. */
...@@ -203,6 +205,7 @@ ...@@ -203,6 +205,7 @@
#define DATA_INT_EXT INT_0 #define DATA_INT_EXT INT_0
#define ALL_INT_EXT DATA_INT_EXT #define ALL_INT_EXT DATA_INT_EXT
#define NUM_INT_EXT 1 #define NUM_INT_EXT 1
#define UNHANDLED_IRQ_MASK GENMASK(MAX_NUM_INT - 1, NUM_INT_EXT)
#define DATA_INT_CLR CLR_INT0 #define DATA_INT_CLR CLR_INT0
......
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