Commit edd0c8f4 authored by IWAMOTO Masahiko's avatar IWAMOTO Masahiko Committed by Cyrille Pitchen

mtd: spi-nor: Add support for mr25h40

Add Everspin mr25h40 512KB MRAM to the list of supported chips.
Signed-off-by: default avatarMasahiko Iwamoto <iwamoto@allied-telesis.co.jp>
Reviewed-by: default avatarJagan Teki <jagan@openedev.com>
Acked-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@atmel.com>
parent 61e46118
...@@ -826,6 +826,7 @@ static const struct flash_info spi_nor_ids[] = { ...@@ -826,6 +826,7 @@ static const struct flash_info spi_nor_ids[] = {
/* Everspin */ /* Everspin */
{ "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
{ "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
{ "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
/* Fujitsu */ /* Fujitsu */
{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) }, { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
......
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