Commit edf7550a authored by Joel Stanley's avatar Joel Stanley Committed by Jonathan Cameron

iio: adc: aspeed: Deassert reset in probe

The ASPEED SoC must deassert a reset in order to use the ADC peripheral.

The device tree bindings are updated to document the resets phandle, and
the example is updated to match what is expected for both the reset and
clock phandle. Note that the bindings should have always had the reset
controller, as the hardware is unusable without it.
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 02c5dff5
...@@ -8,6 +8,7 @@ Required properties: ...@@ -8,6 +8,7 @@ Required properties:
- reg: memory window mapping address and length - reg: memory window mapping address and length
- clocks: Input clock used to derive the sample clock. Expected to be the - clocks: Input clock used to derive the sample clock. Expected to be the
SoC's APB clock. SoC's APB clock.
- resets: Reset controller phandle
- #io-channel-cells: Must be set to <1> to indicate channels are selected - #io-channel-cells: Must be set to <1> to indicate channels are selected
by index. by index.
...@@ -15,6 +16,7 @@ Example: ...@@ -15,6 +16,7 @@ Example:
adc@1e6e9000 { adc@1e6e9000 {
compatible = "aspeed,ast2400-adc"; compatible = "aspeed,ast2400-adc";
reg = <0x1e6e9000 0xb0>; reg = <0x1e6e9000 0xb0>;
clocks = <&clk_apb>; clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_ADC>;
#io-channel-cells = <1>; #io-channel-cells = <1>;
}; };
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/reset.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/types.h> #include <linux/types.h>
...@@ -53,11 +54,12 @@ struct aspeed_adc_model_data { ...@@ -53,11 +54,12 @@ struct aspeed_adc_model_data {
}; };
struct aspeed_adc_data { struct aspeed_adc_data {
struct device *dev; struct device *dev;
void __iomem *base; void __iomem *base;
spinlock_t clk_lock; spinlock_t clk_lock;
struct clk_hw *clk_prescaler; struct clk_hw *clk_prescaler;
struct clk_hw *clk_scaler; struct clk_hw *clk_scaler;
struct reset_control *rst;
}; };
#define ASPEED_CHAN(_idx, _data_reg_addr) { \ #define ASPEED_CHAN(_idx, _data_reg_addr) { \
...@@ -217,6 +219,15 @@ static int aspeed_adc_probe(struct platform_device *pdev) ...@@ -217,6 +219,15 @@ static int aspeed_adc_probe(struct platform_device *pdev)
goto scaler_error; goto scaler_error;
} }
data->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
if (IS_ERR(data->rst)) {
dev_err(&pdev->dev,
"invalid or missing reset controller device tree entry");
ret = PTR_ERR(data->rst);
goto reset_error;
}
reset_control_deassert(data->rst);
model_data = of_device_get_match_data(&pdev->dev); model_data = of_device_get_match_data(&pdev->dev);
if (model_data->wait_init_sequence) { if (model_data->wait_init_sequence) {
...@@ -263,9 +274,10 @@ static int aspeed_adc_probe(struct platform_device *pdev) ...@@ -263,9 +274,10 @@ static int aspeed_adc_probe(struct platform_device *pdev)
writel(ASPEED_OPERATION_MODE_POWER_DOWN, writel(ASPEED_OPERATION_MODE_POWER_DOWN,
data->base + ASPEED_REG_ENGINE_CONTROL); data->base + ASPEED_REG_ENGINE_CONTROL);
clk_disable_unprepare(data->clk_scaler->clk); clk_disable_unprepare(data->clk_scaler->clk);
reset_error:
reset_control_assert(data->rst);
clk_enable_error: clk_enable_error:
clk_hw_unregister_divider(data->clk_scaler); clk_hw_unregister_divider(data->clk_scaler);
scaler_error: scaler_error:
clk_hw_unregister_divider(data->clk_prescaler); clk_hw_unregister_divider(data->clk_prescaler);
return ret; return ret;
...@@ -280,6 +292,7 @@ static int aspeed_adc_remove(struct platform_device *pdev) ...@@ -280,6 +292,7 @@ static int aspeed_adc_remove(struct platform_device *pdev)
writel(ASPEED_OPERATION_MODE_POWER_DOWN, writel(ASPEED_OPERATION_MODE_POWER_DOWN,
data->base + ASPEED_REG_ENGINE_CONTROL); data->base + ASPEED_REG_ENGINE_CONTROL);
clk_disable_unprepare(data->clk_scaler->clk); clk_disable_unprepare(data->clk_scaler->clk);
reset_control_assert(data->rst);
clk_hw_unregister_divider(data->clk_scaler); clk_hw_unregister_divider(data->clk_scaler);
clk_hw_unregister_divider(data->clk_prescaler); clk_hw_unregister_divider(data->clk_prescaler);
......
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