Commit ee2e74f7 authored by Sonny Jiang's avatar Sonny Jiang Committed by Alex Deucher

drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn

Enable asic Verde, Tahiti and Pitcairn UVD block.
Signed-off-by: default avatarSonny Jiang <sonny.jiang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d375615c
...@@ -2197,7 +2197,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev) ...@@ -2197,7 +2197,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
else else
amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block); amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block);
/* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */ amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
/* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */ /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
break; break;
case CHIP_OLAND: case CHIP_OLAND:
......
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