Commit ee7d8c20 authored by Petri Gynther's avatar Petri Gynther Committed by David S. Miller

net: bcmgenet: add UMAC_IRQ_RXDMA_DONE and UMAC_IRQ_TXDMA_DONE

Add #define for UMAC_IRQ_RXDMA_DONE and UMAC_IRQ_TXDMA_DONE in order
to simplify the code that handles Rx and Tx default queue interrupts.
Signed-off-by: default avatarPetri Gynther <pgynther@google.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3271e4f1
...@@ -966,15 +966,13 @@ static void bcmgenet_free_cb(struct enet_cb *cb) ...@@ -966,15 +966,13 @@ static void bcmgenet_free_cb(struct enet_cb *cb)
static inline void bcmgenet_rx_ring16_int_disable(struct bcmgenet_rx_ring *ring) static inline void bcmgenet_rx_ring16_int_disable(struct bcmgenet_rx_ring *ring)
{ {
bcmgenet_intrl2_0_writel(ring->priv, bcmgenet_intrl2_0_writel(ring->priv, UMAC_IRQ_RXDMA_DONE,
UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_RXDMA_PDONE,
INTRL2_CPU_MASK_SET); INTRL2_CPU_MASK_SET);
} }
static inline void bcmgenet_rx_ring16_int_enable(struct bcmgenet_rx_ring *ring) static inline void bcmgenet_rx_ring16_int_enable(struct bcmgenet_rx_ring *ring)
{ {
bcmgenet_intrl2_0_writel(ring->priv, bcmgenet_intrl2_0_writel(ring->priv, UMAC_IRQ_RXDMA_DONE,
UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_RXDMA_PDONE,
INTRL2_CPU_MASK_CLEAR); INTRL2_CPU_MASK_CLEAR);
} }
...@@ -994,15 +992,13 @@ static inline void bcmgenet_rx_ring_int_enable(struct bcmgenet_rx_ring *ring) ...@@ -994,15 +992,13 @@ static inline void bcmgenet_rx_ring_int_enable(struct bcmgenet_rx_ring *ring)
static inline void bcmgenet_tx_ring16_int_disable(struct bcmgenet_tx_ring *ring) static inline void bcmgenet_tx_ring16_int_disable(struct bcmgenet_tx_ring *ring)
{ {
bcmgenet_intrl2_0_writel(ring->priv, bcmgenet_intrl2_0_writel(ring->priv, UMAC_IRQ_TXDMA_DONE,
UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE,
INTRL2_CPU_MASK_SET); INTRL2_CPU_MASK_SET);
} }
static inline void bcmgenet_tx_ring16_int_enable(struct bcmgenet_tx_ring *ring) static inline void bcmgenet_tx_ring16_int_enable(struct bcmgenet_tx_ring *ring)
{ {
bcmgenet_intrl2_0_writel(ring->priv, bcmgenet_intrl2_0_writel(ring->priv, UMAC_IRQ_TXDMA_DONE,
UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE,
INTRL2_CPU_MASK_CLEAR); INTRL2_CPU_MASK_CLEAR);
} }
...@@ -1727,10 +1723,10 @@ static int init_umac(struct bcmgenet_priv *priv) ...@@ -1727,10 +1723,10 @@ static int init_umac(struct bcmgenet_priv *priv)
bcmgenet_intr_disable(priv); bcmgenet_intr_disable(priv);
/* Enable Rx default queue 16 interrupts */ /* Enable Rx default queue 16 interrupts */
int0_enable |= (UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_RXDMA_PDONE); int0_enable |= UMAC_IRQ_RXDMA_DONE;
/* Enable Tx default queue 16 interrupts */ /* Enable Tx default queue 16 interrupts */
int0_enable |= (UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE); int0_enable |= UMAC_IRQ_TXDMA_DONE;
/* Monitor cable plug/unplugged event for internal PHY */ /* Monitor cable plug/unplugged event for internal PHY */
if (phy_is_internal(priv->phydev)) { if (phy_is_internal(priv->phydev)) {
...@@ -2353,7 +2349,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) ...@@ -2353,7 +2349,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id)
netif_dbg(priv, intr, priv->dev, netif_dbg(priv, intr, priv->dev,
"IRQ=0x%x\n", priv->irq0_stat); "IRQ=0x%x\n", priv->irq0_stat);
if (priv->irq0_stat & (UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_RXDMA_PDONE)) { if (priv->irq0_stat & UMAC_IRQ_RXDMA_DONE) {
rx_ring = &priv->rx_rings[DESC_INDEX]; rx_ring = &priv->rx_rings[DESC_INDEX];
if (likely(napi_schedule_prep(&rx_ring->napi))) { if (likely(napi_schedule_prep(&rx_ring->napi))) {
...@@ -2362,7 +2358,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) ...@@ -2362,7 +2358,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id)
} }
} }
if (priv->irq0_stat & (UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE)) { if (priv->irq0_stat & UMAC_IRQ_TXDMA_DONE) {
tx_ring = &priv->tx_rings[DESC_INDEX]; tx_ring = &priv->tx_rings[DESC_INDEX];
if (likely(napi_schedule_prep(&tx_ring->napi))) { if (likely(napi_schedule_prep(&tx_ring->napi))) {
......
...@@ -303,9 +303,13 @@ struct bcmgenet_mib_counters { ...@@ -303,9 +303,13 @@ struct bcmgenet_mib_counters {
#define UMAC_IRQ_RXDMA_MBDONE (1 << 13) #define UMAC_IRQ_RXDMA_MBDONE (1 << 13)
#define UMAC_IRQ_RXDMA_PDONE (1 << 14) #define UMAC_IRQ_RXDMA_PDONE (1 << 14)
#define UMAC_IRQ_RXDMA_BDONE (1 << 15) #define UMAC_IRQ_RXDMA_BDONE (1 << 15)
#define UMAC_IRQ_RXDMA_DONE (UMAC_IRQ_RXDMA_PDONE | \
UMAC_IRQ_RXDMA_BDONE)
#define UMAC_IRQ_TXDMA_MBDONE (1 << 16) #define UMAC_IRQ_TXDMA_MBDONE (1 << 16)
#define UMAC_IRQ_TXDMA_PDONE (1 << 17) #define UMAC_IRQ_TXDMA_PDONE (1 << 17)
#define UMAC_IRQ_TXDMA_BDONE (1 << 18) #define UMAC_IRQ_TXDMA_BDONE (1 << 18)
#define UMAC_IRQ_TXDMA_DONE (UMAC_IRQ_TXDMA_PDONE | \
UMAC_IRQ_TXDMA_BDONE)
/* Only valid for GENETv3+ */ /* Only valid for GENETv3+ */
#define UMAC_IRQ_MDIO_DONE (1 << 23) #define UMAC_IRQ_MDIO_DONE (1 << 23)
#define UMAC_IRQ_MDIO_ERROR (1 << 24) #define UMAC_IRQ_MDIO_ERROR (1 << 24)
......
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