Commit eebc8e2c authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman

ARM: dts: r8a7792: add JPU clocks

Add JPU clock and its parent, M2 clock to the R8A7792 device tree.
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent adc47ecf
......@@ -280,8 +280,24 @@ cp_clk: cp {
clock-div = <48>;
clock-mult = <1>;
};
m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
};
/* Gate clocks */
mstp1_clks: mstp1_clks@e6150134 {
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
clocks = <&m2_clk>;
#clock-cells = <1>;
clock-indices = <R8A7792_CLK_JPU>;
clock-output-names = "jpu";
};
mstp2_clks: mstp2_clks@e6150138 {
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
......
......@@ -24,6 +24,7 @@
#define R8A7792_CLK_MSIOF0 0
/* MSTP1 */
#define R8A7792_CLK_JPU 6
#define R8A7792_CLK_TMU1 11
#define R8A7792_CLK_TMU3 21
#define R8A7792_CLK_TMU2 22
......
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