Commit eeca2324 authored by Joe Perches's avatar Joe Perches Committed by Alex Deucher

drm: Use pr_cont where appropriate

Using 'printk("\n")' is not preferred anymore and
using printk to continue logging messages now produces
multiple line logging output unless the continuations
use KERN_CONT.

Convert these uses to appropriately use pr_cont or a
single printk where possible.

Miscellanea:

o Use a temporary const char * instead of multiple printks
o Remove trailing space from logging by using a leading space instead
Signed-off-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9dc5a91e
...@@ -31,86 +31,88 @@ ...@@ -31,86 +31,88 @@
void amdgpu_dpm_print_class_info(u32 class, u32 class2) void amdgpu_dpm_print_class_info(u32 class, u32 class2)
{ {
printk("\tui class: "); const char *s;
switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
case ATOM_PPLIB_CLASSIFICATION_UI_NONE: case ATOM_PPLIB_CLASSIFICATION_UI_NONE:
default: default:
printk("none\n"); s = "none";
break; break;
case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY: case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY:
printk("battery\n"); s = "battery";
break; break;
case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED: case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED:
printk("balanced\n"); s = "balanced";
break; break;
case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE: case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE:
printk("performance\n"); s = "performance";
break; break;
} }
printk("\tinternal class: "); printk("\tui class: %s\n", s);
printk("\tinternal class:");
if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) && if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) &&
(class2 == 0)) (class2 == 0))
printk("none"); pr_cont(" none");
else { else {
if (class & ATOM_PPLIB_CLASSIFICATION_BOOT) if (class & ATOM_PPLIB_CLASSIFICATION_BOOT)
printk("boot "); pr_cont(" boot");
if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL) if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
printk("thermal "); pr_cont(" thermal");
if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE) if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE)
printk("limited_pwr "); pr_cont(" limited_pwr");
if (class & ATOM_PPLIB_CLASSIFICATION_REST) if (class & ATOM_PPLIB_CLASSIFICATION_REST)
printk("rest "); pr_cont(" rest");
if (class & ATOM_PPLIB_CLASSIFICATION_FORCED) if (class & ATOM_PPLIB_CLASSIFICATION_FORCED)
printk("forced "); pr_cont(" forced");
if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE) if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
printk("3d_perf "); pr_cont(" 3d_perf");
if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE) if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE)
printk("ovrdrv "); pr_cont(" ovrdrv");
if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)
printk("uvd "); pr_cont(" uvd");
if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW) if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW)
printk("3d_low "); pr_cont(" 3d_low");
if (class & ATOM_PPLIB_CLASSIFICATION_ACPI) if (class & ATOM_PPLIB_CLASSIFICATION_ACPI)
printk("acpi "); pr_cont(" acpi");
if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE) if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
printk("uvd_hd2 "); pr_cont(" uvd_hd2");
if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
printk("uvd_hd "); pr_cont(" uvd_hd");
if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
printk("uvd_sd "); pr_cont(" uvd_sd");
if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2)
printk("limited_pwr2 "); pr_cont(" limited_pwr2");
if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
printk("ulv "); pr_cont(" ulv");
if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
printk("uvd_mvc "); pr_cont(" uvd_mvc");
} }
printk("\n"); pr_cont("\n");
} }
void amdgpu_dpm_print_cap_info(u32 caps) void amdgpu_dpm_print_cap_info(u32 caps)
{ {
printk("\tcaps: "); printk("\tcaps:");
if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY)
printk("single_disp "); pr_cont(" single_disp");
if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK) if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK)
printk("video "); pr_cont(" video");
if (caps & ATOM_PPLIB_DISALLOW_ON_DC) if (caps & ATOM_PPLIB_DISALLOW_ON_DC)
printk("no_dc "); pr_cont(" no_dc");
printk("\n"); pr_cont("\n");
} }
void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev, void amdgpu_dpm_print_ps_status(struct amdgpu_device *adev,
struct amdgpu_ps *rps) struct amdgpu_ps *rps)
{ {
printk("\tstatus: "); printk("\tstatus:");
if (rps == adev->pm.dpm.current_ps) if (rps == adev->pm.dpm.current_ps)
printk("c "); pr_cont(" c");
if (rps == adev->pm.dpm.requested_ps) if (rps == adev->pm.dpm.requested_ps)
printk("r "); pr_cont(" r");
if (rps == adev->pm.dpm.boot_ps) if (rps == adev->pm.dpm.boot_ps)
printk("b "); pr_cont(" b");
printk("\n"); pr_cont("\n");
} }
......
...@@ -69,86 +69,89 @@ const u32 r600_dtc[R600_PM_NUMBER_OF_TC] = ...@@ -69,86 +69,89 @@ const u32 r600_dtc[R600_PM_NUMBER_OF_TC] =
void r600_dpm_print_class_info(u32 class, u32 class2) void r600_dpm_print_class_info(u32 class, u32 class2)
{ {
printk("\tui class: "); const char *s;
switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) { switch (class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
case ATOM_PPLIB_CLASSIFICATION_UI_NONE: case ATOM_PPLIB_CLASSIFICATION_UI_NONE:
default: default:
printk("none\n"); s = "none";
break; break;
case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY: case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY:
printk("battery\n"); s = "battery";
break; break;
case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED: case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED:
printk("balanced\n"); s = "balanced";
break; break;
case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE: case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE:
printk("performance\n"); s = "performance";
break; break;
} }
printk("\tinternal class: "); printk("\tui class: %s\n", s);
printk("\tinternal class:");
if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) && if (((class & ~ATOM_PPLIB_CLASSIFICATION_UI_MASK) == 0) &&
(class2 == 0)) (class2 == 0))
printk("none"); pr_cont(" none");
else { else {
if (class & ATOM_PPLIB_CLASSIFICATION_BOOT) if (class & ATOM_PPLIB_CLASSIFICATION_BOOT)
printk("boot "); pr_cont(" boot");
if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL) if (class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
printk("thermal "); pr_cont(" thermal");
if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE) if (class & ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE)
printk("limited_pwr "); pr_cont(" limited_pwr");
if (class & ATOM_PPLIB_CLASSIFICATION_REST) if (class & ATOM_PPLIB_CLASSIFICATION_REST)
printk("rest "); pr_cont(" rest");
if (class & ATOM_PPLIB_CLASSIFICATION_FORCED) if (class & ATOM_PPLIB_CLASSIFICATION_FORCED)
printk("forced "); pr_cont(" forced");
if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE) if (class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
printk("3d_perf "); pr_cont(" 3d_perf");
if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE) if (class & ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE)
printk("ovrdrv "); pr_cont(" ovrdrv");
if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE)
printk("uvd "); pr_cont(" uvd");
if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW) if (class & ATOM_PPLIB_CLASSIFICATION_3DLOW)
printk("3d_low "); pr_cont(" 3d_low");
if (class & ATOM_PPLIB_CLASSIFICATION_ACPI) if (class & ATOM_PPLIB_CLASSIFICATION_ACPI)
printk("acpi "); pr_cont(" acpi");
if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE) if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
printk("uvd_hd2 "); pr_cont(" uvd_hd2");
if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
printk("uvd_hd "); pr_cont(" uvd_hd");
if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
printk("uvd_sd "); pr_cont(" uvd_sd");
if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2) if (class2 & ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2)
printk("limited_pwr2 "); pr_cont(" limited_pwr2");
if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) if (class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
printk("ulv "); pr_cont(" ulv");
if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
printk("uvd_mvc "); pr_cont(" uvd_mvc");
} }
printk("\n"); pr_cont("\n");
} }
void r600_dpm_print_cap_info(u32 caps) void r600_dpm_print_cap_info(u32 caps)
{ {
printk("\tcaps: "); printk("\tcaps:");
if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) if (caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY)
printk("single_disp "); pr_cont(" single_disp");
if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK) if (caps & ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK)
printk("video "); pr_cont(" video");
if (caps & ATOM_PPLIB_DISALLOW_ON_DC) if (caps & ATOM_PPLIB_DISALLOW_ON_DC)
printk("no_dc "); pr_cont(" no_dc");
printk("\n"); pr_cont("\n");
} }
void r600_dpm_print_ps_status(struct radeon_device *rdev, void r600_dpm_print_ps_status(struct radeon_device *rdev,
struct radeon_ps *rps) struct radeon_ps *rps)
{ {
printk("\tstatus: "); printk("\tstatus:");
if (rps == rdev->pm.dpm.current_ps) if (rps == rdev->pm.dpm.current_ps)
printk("c "); pr_cont(" c");
if (rps == rdev->pm.dpm.requested_ps) if (rps == rdev->pm.dpm.requested_ps)
printk("r "); pr_cont(" r");
if (rps == rdev->pm.dpm.boot_ps) if (rps == rdev->pm.dpm.boot_ps)
printk("b "); pr_cont(" b");
printk("\n"); pr_cont("\n");
} }
u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) u32 r600_dpm_get_vblank_time(struct radeon_device *rdev)
......
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