Commit ef641c44 authored by Sai Krishna Potthuri's avatar Sai Krishna Potthuri Committed by Linus Walleij

dt-bindings: pinctrl-zynq: Replace 'io-standard' with 'power-source'

Replace custom pin configuration option 'io-standard' with generic property
'power-source' for Zynq pinctrl also add dt-binding file contains pin
configuration defines for Zynq pinctrl.
Signed-off-by: default avatarSai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1626868353-96475-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.comSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 153df45a
...@@ -156,10 +156,7 @@ patternProperties: ...@@ -156,10 +156,7 @@ patternProperties:
slew-rate: slew-rate:
enum: [0, 1] enum: [0, 1]
io-standard: power-source:
description:
Selects the IO standard for MIO pins, this is driver specific.
$ref: "/schemas/types.yaml#/definitions/uint32"
enum: [1, 2, 3, 4] enum: [1, 2, 3, 4]
oneOf: oneOf:
...@@ -179,6 +176,7 @@ additionalProperties: false ...@@ -179,6 +176,7 @@ additionalProperties: false
examples: examples:
- | - |
#include <dt-bindings/pinctrl/pinctrl-zynq.h>
pinctrl0: pinctrl@700 { pinctrl0: pinctrl@700 {
compatible = "xlnx,zynq-pinctrl"; compatible = "xlnx,zynq-pinctrl";
reg = <0x700 0x200>; reg = <0x700 0x200>;
...@@ -193,7 +191,7 @@ examples: ...@@ -193,7 +191,7 @@ examples:
conf { conf {
groups = "uart1_10_grp"; groups = "uart1_10_grp";
slew-rate = <0>; slew-rate = <0>;
io-standard = <1>; power-source = <IO_STANDARD_LVCMOS18>;
}; };
conf-rx { conf-rx {
......
/* SPDX-License-Identifier: GPL-2.0 */
/*
* MIO pin configuration defines for Xilinx Zynq
*
* Copyright (C) 2021 Xilinx, Inc.
*/
#ifndef _DT_BINDINGS_PINCTRL_ZYNQ_H
#define _DT_BINDINGS_PINCTRL_ZYNQ_H
/* Configuration options for different power supplies */
#define IO_STANDARD_LVCMOS18 1
#define IO_STANDARD_LVCMOS25 2
#define IO_STANDARD_LVCMOS33 3
#define IO_STANDARD_HSTL 4
#endif /* _DT_BINDINGS_PINCTRL_ZYNQ_H */
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