Commit f00caa76 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
  ALSA: hda - targa and targa-2ch fix
  ALSA: hda - fix beep tone calculation for IDT/STAC codecs
  ALSA: hda - Missing volume controls for Intel HDA (ALC269/EeePC)
  ALSA: hda - Disable AMD SB600 64bit address support only
  ALSA: hda - Check widget types while parsing capture source in patch_via.c
  ALSA: hda - Fix capture source selection in patch_via.c
  ALSA: hda - Add missing EAPD initialization for VIA codecs
  ALSA: hda - Clean up VT170x dig-in initialization code
  ALSA: hda - Fix error path in the sanity check in azx_pcm_open()
  ALSA: hda - move 8086:fb30 quirk (stac9205) to the proper section
  ASoC: Fix wm8753 register cache size and initialization
  ASoC: add locking to mpc5200-psc-ac97 driver
  ASoC: Fix mpc5200-psc-ac97 to ensure the data ready bit is cleared
  ASoC: Fix register cache initialisation for WM8753
parents 8711c67b 3ae30796
......@@ -50,19 +50,22 @@ static void snd_hda_generate_beep(struct work_struct *work)
* The tone frequency of beep generator on IDT/STAC codecs is
* defined from the 8bit tone parameter, in Hz,
* freq = 48000 * (257 - tone) / 1024
* that is from 12kHz to 93.75kHz in step of 46.875 hz
* that is from 12kHz to 93.75Hz in steps of 46.875 Hz
*/
static int beep_linear_tone(struct hda_beep *beep, int hz)
{
if (hz <= 0)
return 0;
hz *= 1000; /* fixed point */
hz = hz - DIGBEEP_HZ_MIN;
hz = hz - DIGBEEP_HZ_MIN
+ DIGBEEP_HZ_STEP / 2; /* round to nearest step */
if (hz < 0)
hz = 0; /* turn off PC beep*/
else if (hz >= (DIGBEEP_HZ_MAX - DIGBEEP_HZ_MIN))
hz = 0xff;
hz = 1; /* max frequency */
else {
hz /= DIGBEEP_HZ_STEP;
hz++;
hz = 255 - hz;
}
return hz;
}
......
......@@ -1455,6 +1455,17 @@ static int azx_pcm_open(struct snd_pcm_substream *substream)
return err;
}
snd_pcm_limit_hw_rates(runtime);
/* sanity check */
if (snd_BUG_ON(!runtime->hw.channels_min) ||
snd_BUG_ON(!runtime->hw.channels_max) ||
snd_BUG_ON(!runtime->hw.formats) ||
snd_BUG_ON(!runtime->hw.rates)) {
azx_release_device(azx_dev);
hinfo->ops.close(hinfo, apcm->codec, substream);
snd_hda_power_down(apcm->codec);
mutex_unlock(&chip->open_mutex);
return -EINVAL;
}
spin_lock_irqsave(&chip->reg_lock, flags);
azx_dev->substream = substream;
azx_dev->running = 0;
......@@ -1463,13 +1474,6 @@ static int azx_pcm_open(struct snd_pcm_substream *substream)
runtime->private_data = azx_dev;
snd_pcm_set_sync(substream);
mutex_unlock(&chip->open_mutex);
if (snd_BUG_ON(!runtime->hw.channels_min || !runtime->hw.channels_max))
return -EINVAL;
if (snd_BUG_ON(!runtime->hw.formats))
return -EINVAL;
if (snd_BUG_ON(!runtime->hw.rates))
return -EINVAL;
return 0;
}
......@@ -2329,9 +2333,19 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
gcap = azx_readw(chip, GCAP);
snd_printdd(SFX "chipset global capabilities = 0x%x\n", gcap);
/* ATI chips seems buggy about 64bit DMA addresses */
if (chip->driver_type == AZX_DRIVER_ATI)
gcap &= ~ICH6_GCAP_64OK;
/* disable SB600 64bit support for safety */
if ((chip->driver_type == AZX_DRIVER_ATI) ||
(chip->driver_type == AZX_DRIVER_ATIHDMI)) {
struct pci_dev *p_smbus;
p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
PCI_DEVICE_ID_ATI_SBX00_SMBUS,
NULL);
if (p_smbus) {
if (p_smbus->revision < 0x30)
gcap &= ~ICH6_GCAP_64OK;
pci_dev_put(p_smbus);
}
}
/* allow 64bit DMA address if supported by H/W */
if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
......
......@@ -6919,9 +6919,6 @@ static struct hda_verb alc882_targa_verbs[] = {
{0x1b, AC_VERB_SET_CONNECT_SEL, 0x00}, /* HP */
{0x14, AC_VERB_SET_UNSOLICITED_ENABLE, ALC880_HP_EVENT | AC_USRSP_EN},
{0x01, AC_VERB_SET_GPIO_MASK, 0x03},
{0x01, AC_VERB_SET_GPIO_DIRECTION, 0x03},
{0x01, AC_VERB_SET_GPIO_DATA, 0x03},
{ } /* end */
};
......@@ -7241,7 +7238,8 @@ static struct alc_config_preset alc882_presets[] = {
},
[ALC882_TARGA] = {
.mixers = { alc882_targa_mixer, alc882_chmode_mixer },
.init_verbs = { alc882_init_verbs, alc882_targa_verbs},
.init_verbs = { alc882_init_verbs, alc880_gpio3_init_verbs,
alc882_targa_verbs},
.num_dacs = ARRAY_SIZE(alc882_dac_nids),
.dac_nids = alc882_dac_nids,
.dig_out_nid = ALC882_DIGOUT_NID,
......@@ -9238,7 +9236,8 @@ static struct alc_config_preset alc883_presets[] = {
},
[ALC883_TARGA_DIG] = {
.mixers = { alc883_targa_mixer, alc883_chmode_mixer },
.init_verbs = { alc883_init_verbs, alc883_targa_verbs},
.init_verbs = { alc883_init_verbs, alc880_gpio3_init_verbs,
alc883_targa_verbs},
.num_dacs = ARRAY_SIZE(alc883_dac_nids),
.dac_nids = alc883_dac_nids,
.dig_out_nid = ALC883_DIGOUT_NID,
......@@ -9251,7 +9250,8 @@ static struct alc_config_preset alc883_presets[] = {
},
[ALC883_TARGA_2ch_DIG] = {
.mixers = { alc883_targa_2ch_mixer},
.init_verbs = { alc883_init_verbs, alc883_targa_verbs},
.init_verbs = { alc883_init_verbs, alc880_gpio3_init_verbs,
alc883_targa_verbs},
.num_dacs = ARRAY_SIZE(alc883_dac_nids),
.dac_nids = alc883_dac_nids,
.adc_nids = alc883_adc_nids_alt,
......@@ -12878,9 +12878,9 @@ static struct snd_kcontrol_new alc269_lifebook_mixer[] = {
static struct snd_kcontrol_new alc269_eeepc_mixer[] = {
HDA_CODEC_MUTE("Speaker Playback Switch", 0x14, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Speaker Playback Volume", 0x02, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Speaker Playback Volume", 0x02, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Headphone Playback Switch", 0x15, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT),
{ } /* end */
};
......
......@@ -1590,8 +1590,6 @@ static struct snd_pci_quirk stac9200_cfg_tbl[] = {
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_REF),
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
"SigmaTel",STAC_9205_REF),
SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
"DFI LanParty", STAC_REF),
/* Dell laptops have BIOS problem */
......@@ -2344,6 +2342,8 @@ static struct snd_pci_quirk stac9205_cfg_tbl[] = {
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_9205_REF),
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
"SigmaTel", STAC_9205_REF),
SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
"DFI LanParty", STAC_9205_REF),
/* Dell */
......
......@@ -210,7 +210,9 @@ struct via_spec {
/* capture */
unsigned int num_adc_nids;
hda_nid_t *adc_nids;
hda_nid_t mux_nids[3];
hda_nid_t dig_in_nid;
hda_nid_t dig_in_pin;
/* capture source */
const struct hda_input_mux *input_mux;
......@@ -319,6 +321,9 @@ static void via_auto_set_output_and_unmute(struct hda_codec *codec,
pin_type);
snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_UNMUTE);
if (snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_EAPD)
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x02);
}
......@@ -387,27 +392,12 @@ static int via_mux_enum_put(struct snd_kcontrol *kcontrol,
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
struct via_spec *spec = codec->spec;
unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
unsigned int vendor_id = codec->vendor_id;
/* AIW0 lydia 060801 add for correct sw0 input select */
if (IS_VT1708_VENDORID(vendor_id) && (adc_idx == 0))
return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
0x18, &spec->cur_mux[adc_idx]);
else if ((IS_VT1709_10CH_VENDORID(vendor_id) ||
IS_VT1709_6CH_VENDORID(vendor_id)) && (adc_idx == 0))
return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
0x19, &spec->cur_mux[adc_idx]);
else if ((IS_VT1708B_8CH_VENDORID(vendor_id) ||
IS_VT1708B_4CH_VENDORID(vendor_id)) && (adc_idx == 0))
return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
0x17, &spec->cur_mux[adc_idx]);
else if (IS_VT1702_VENDORID(vendor_id) && (adc_idx == 0))
return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
0x13, &spec->cur_mux[adc_idx]);
else
return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
spec->adc_nids[adc_idx],
&spec->cur_mux[adc_idx]);
if (!spec->mux_nids[adc_idx])
return -EINVAL;
return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
spec->mux_nids[adc_idx],
&spec->cur_mux[adc_idx]);
}
static int via_independent_hp_info(struct snd_kcontrol *kcontrol,
......@@ -998,25 +988,11 @@ static int via_init(struct hda_codec *codec)
/* Lydia Add for EAPD enable */
if (!spec->dig_in_nid) { /* No Digital In connection */
if (IS_VT1708_VENDORID(codec->vendor_id)) {
snd_hda_codec_write(codec, VT1708_DIGIN_PIN, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
PIN_OUT);
snd_hda_codec_write(codec, VT1708_DIGIN_PIN, 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x02);
} else if (IS_VT1709_10CH_VENDORID(codec->vendor_id) ||
IS_VT1709_6CH_VENDORID(codec->vendor_id)) {
snd_hda_codec_write(codec, VT1709_DIGIN_PIN, 0,
if (spec->dig_in_pin) {
snd_hda_codec_write(codec, spec->dig_in_pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
PIN_OUT);
snd_hda_codec_write(codec, VT1709_DIGIN_PIN, 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x02);
} else if (IS_VT1708B_8CH_VENDORID(codec->vendor_id) ||
IS_VT1708B_4CH_VENDORID(codec->vendor_id)) {
snd_hda_codec_write(codec, VT1708B_DIGIN_PIN, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
PIN_OUT);
snd_hda_codec_write(codec, VT1708B_DIGIN_PIN, 0,
snd_hda_codec_write(codec, spec->dig_in_pin, 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x02);
}
} else /* enable SPDIF-input pin */
......@@ -1326,6 +1302,7 @@ static int vt1708_parse_auto_config(struct hda_codec *codec)
if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1708_DIGOUT_NID;
spec->dig_in_pin = VT1708_DIGIN_PIN;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = VT1708_DIGIN_NID;
......@@ -1352,6 +1329,34 @@ static int via_auto_init(struct hda_codec *codec)
return 0;
}
static int get_mux_nids(struct hda_codec *codec)
{
struct via_spec *spec = codec->spec;
hda_nid_t nid, conn[8];
unsigned int type;
int i, n;
for (i = 0; i < spec->num_adc_nids; i++) {
nid = spec->adc_nids[i];
while (nid) {
type = (get_wcaps(codec, nid) & AC_WCAP_TYPE)
>> AC_WCAP_TYPE_SHIFT;
if (type == AC_WID_PIN)
break;
n = snd_hda_get_connections(codec, nid, conn,
ARRAY_SIZE(conn));
if (n <= 0)
break;
if (n > 1) {
spec->mux_nids[i] = nid;
break;
}
nid = conn[0];
}
}
return 0;
}
static int patch_vt1708(struct hda_codec *codec)
{
struct via_spec *spec;
......@@ -1799,6 +1804,7 @@ static int vt1709_parse_auto_config(struct hda_codec *codec)
if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1709_DIGOUT_NID;
spec->dig_in_pin = VT1709_DIGIN_PIN;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = VT1709_DIGIN_NID;
......@@ -1859,6 +1865,7 @@ static int patch_vt1709_10ch(struct hda_codec *codec)
if (!spec->adc_nids && spec->input_mux) {
spec->adc_nids = vt1709_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(vt1709_adc_nids);
get_mux_nids(codec);
spec->mixers[spec->num_mixers] = vt1709_capture_mixer;
spec->num_mixers++;
}
......@@ -1952,6 +1959,7 @@ static int patch_vt1709_6ch(struct hda_codec *codec)
if (!spec->adc_nids && spec->input_mux) {
spec->adc_nids = vt1709_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(vt1709_adc_nids);
get_mux_nids(codec);
spec->mixers[spec->num_mixers] = vt1709_capture_mixer;
spec->num_mixers++;
}
......@@ -2344,6 +2352,7 @@ static int vt1708B_parse_auto_config(struct hda_codec *codec)
if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1708B_DIGOUT_NID;
spec->dig_in_pin = VT1708B_DIGIN_PIN;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = VT1708B_DIGIN_NID;
......@@ -2404,6 +2413,7 @@ static int patch_vt1708B_8ch(struct hda_codec *codec)
if (!spec->adc_nids && spec->input_mux) {
spec->adc_nids = vt1708B_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(vt1708B_adc_nids);
get_mux_nids(codec);
spec->mixers[spec->num_mixers] = vt1708B_capture_mixer;
spec->num_mixers++;
}
......@@ -2455,6 +2465,7 @@ static int patch_vt1708B_4ch(struct hda_codec *codec)
if (!spec->adc_nids && spec->input_mux) {
spec->adc_nids = vt1708B_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(vt1708B_adc_nids);
get_mux_nids(codec);
spec->mixers[spec->num_mixers] = vt1708B_capture_mixer;
spec->num_mixers++;
}
......@@ -2889,6 +2900,7 @@ static int patch_vt1708S(struct hda_codec *codec)
if (!spec->adc_nids && spec->input_mux) {
spec->adc_nids = vt1708S_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(vt1708S_adc_nids);
get_mux_nids(codec);
spec->mixers[spec->num_mixers] = vt1708S_capture_mixer;
spec->num_mixers++;
}
......@@ -3206,6 +3218,7 @@ static int patch_vt1702(struct hda_codec *codec)
if (!spec->adc_nids && spec->input_mux) {
spec->adc_nids = vt1702_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(vt1702_adc_nids);
get_mux_nids(codec);
spec->mixers[spec->num_mixers] = vt1702_capture_mixer;
spec->num_mixers++;
}
......
......@@ -79,7 +79,7 @@ static const u16 wm8753_reg[] = {
0x0097, 0x0097, 0x0000, 0x0004,
0x0000, 0x0083, 0x0024, 0x01ba,
0x0000, 0x0083, 0x0024, 0x01ba,
0x0000, 0x0000
0x0000, 0x0000, 0x0000
};
/* codec private data */
......@@ -1660,11 +1660,11 @@ static int wm8753_register(struct wm8753_priv *wm8753)
codec->set_bias_level = wm8753_set_bias_level;
codec->dai = wm8753_dai;
codec->num_dai = 2;
codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache);
codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache) + 1;
codec->reg_cache = &wm8753->reg_cache;
codec->private_data = wm8753;
memcpy(codec->reg_cache, wm8753_reg, sizeof(codec->reg_cache));
memcpy(codec->reg_cache, wm8753_reg, sizeof(wm8753->reg_cache));
INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
ret = wm8753_reset(codec);
......
......@@ -456,6 +456,7 @@ int mpc5200_audio_dma_create(struct of_device *op)
return -ENODEV;
spin_lock_init(&psc_dma->lock);
mutex_init(&psc_dma->mutex);
psc_dma->id = be32_to_cpu(*prop);
psc_dma->irq = irq;
psc_dma->psc_regs = regs;
......
......@@ -55,6 +55,7 @@ struct psc_dma {
unsigned int irq;
struct device *dev;
spinlock_t lock;
struct mutex mutex;
u32 sicr;
uint sysclk;
int imr;
......
......@@ -34,13 +34,20 @@ static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
int status;
unsigned int val;
mutex_lock(&psc_dma->mutex);
/* Wait for command send status zero = ready */
status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
MPC52xx_PSC_SR_CMDSEND), 100, 0);
if (status == 0) {
pr_err("timeout on ac97 bus (rdy)\n");
mutex_unlock(&psc_dma->mutex);
return -ENODEV;
}
/* Force clear the data valid bit */
in_be32(&psc_dma->psc_regs->ac97_data);
/* Send the read */
out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
......@@ -50,16 +57,19 @@ static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
if (status == 0) {
pr_err("timeout on ac97 read (val) %x\n",
in_be16(&psc_dma->psc_regs->sr_csr.status));
mutex_unlock(&psc_dma->mutex);
return -ENODEV;
}
/* Get the data */
val = in_be32(&psc_dma->psc_regs->ac97_data);
if (((val >> 24) & 0x7f) != reg) {
pr_err("reg echo error on ac97 read\n");
mutex_unlock(&psc_dma->mutex);
return -ENODEV;
}
val = (val >> 8) & 0xffff;
mutex_unlock(&psc_dma->mutex);
return (unsigned short) val;
}
......@@ -68,16 +78,21 @@ static void psc_ac97_write(struct snd_ac97 *ac97,
{
int status;
mutex_lock(&psc_dma->mutex);
/* Wait for command status zero = ready */
status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
MPC52xx_PSC_SR_CMDSEND), 100, 0);
if (status == 0) {
pr_err("timeout on ac97 bus (write)\n");
return;
goto out;
}
/* Write data */
out_be32(&psc_dma->psc_regs->ac97_cmd,
((reg & 0x7f) << 24) | (val << 8));
out:
mutex_unlock(&psc_dma->mutex);
}
static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
......
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