Commit f0ac4478 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman

powerpc/64s/exception: move EXCEPTION_PROLOG_2* to a more logical place

No generated code change.
Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 80bd9177
...@@ -174,62 +174,6 @@ ...@@ -174,62 +174,6 @@
ori reg,reg,(ABS_ADDR(label))@l; \ ori reg,reg,(ABS_ADDR(label))@l; \
addis reg,reg,(ABS_ADDR(label))@h addis reg,reg,(ABS_ADDR(label))@h
.macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri
ld r10,PACAKMSR(r13) /* get MSR value for kernel */
.if ! \set_ri
xori r10,r10,MSR_RI /* Clear MSR_RI */
.endif
.if \hsrr
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
.else
mfspr r11,SPRN_SRR0 /* save SRR0 */
.endif
LOAD_HANDLER(r12, \label\())
.if \hsrr
mtspr SPRN_HSRR0,r12
mfspr r12,SPRN_HSRR1 /* and HSRR1 */
mtspr SPRN_HSRR1,r10
HRFI_TO_KERNEL
.else
mtspr SPRN_SRR0,r12
mfspr r12,SPRN_SRR1 /* and SRR1 */
mtspr SPRN_SRR1,r10
RFI_TO_KERNEL
.endif
b . /* prevent speculative execution */
.endm
.macro EXCEPTION_PROLOG_2_VIRT label, hsrr
#ifdef CONFIG_RELOCATABLE
.if \hsrr
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
.else
mfspr r11,SPRN_SRR0 /* save SRR0 */
.endif
LOAD_HANDLER(r12, \label\())
mtctr r12
.if \hsrr
mfspr r12,SPRN_HSRR1 /* and HSRR1 */
.else
mfspr r12,SPRN_SRR1 /* and HSRR1 */
.endif
li r10,MSR_RI
mtmsrd r10,1 /* Set RI (EE=0) */
bctr
#else
.if \hsrr
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
mfspr r12,SPRN_HSRR1 /* and HSRR1 */
.else
mfspr r11,SPRN_SRR0 /* save SRR0 */
mfspr r12,SPRN_SRR1 /* and SRR1 */
.endif
li r10,MSR_RI
mtmsrd r10,1 /* Set RI (EE=0) */
b \label
#endif
.endm
/* Exception register prefixes */ /* Exception register prefixes */
#define EXC_HV 1 #define EXC_HV 1
#define EXC_STD 0 #define EXC_STD 0
...@@ -340,6 +284,63 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) ...@@ -340,6 +284,63 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
std r10,\area\()+EX_R13(r13) std r10,\area\()+EX_R13(r13)
.endm .endm
.macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri
ld r10,PACAKMSR(r13) /* get MSR value for kernel */
.if ! \set_ri
xori r10,r10,MSR_RI /* Clear MSR_RI */
.endif
.if \hsrr
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
.else
mfspr r11,SPRN_SRR0 /* save SRR0 */
.endif
LOAD_HANDLER(r12, \label\())
.if \hsrr
mtspr SPRN_HSRR0,r12
mfspr r12,SPRN_HSRR1 /* and HSRR1 */
mtspr SPRN_HSRR1,r10
HRFI_TO_KERNEL
.else
mtspr SPRN_SRR0,r12
mfspr r12,SPRN_SRR1 /* and SRR1 */
mtspr SPRN_SRR1,r10
RFI_TO_KERNEL
.endif
b . /* prevent speculative execution */
.endm
.macro EXCEPTION_PROLOG_2_VIRT label, hsrr
#ifdef CONFIG_RELOCATABLE
.if \hsrr
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
.else
mfspr r11,SPRN_SRR0 /* save SRR0 */
.endif
LOAD_HANDLER(r12, \label\())
mtctr r12
.if \hsrr
mfspr r12,SPRN_HSRR1 /* and HSRR1 */
.else
mfspr r12,SPRN_SRR1 /* and HSRR1 */
.endif
li r10,MSR_RI
mtmsrd r10,1 /* Set RI (EE=0) */
bctr
#else
.if \hsrr
mfspr r11,SPRN_HSRR0 /* save HSRR0 */
mfspr r12,SPRN_HSRR1 /* and HSRR1 */
.else
mfspr r11,SPRN_SRR0 /* save SRR0 */
mfspr r12,SPRN_SRR1 /* and SRR1 */
.endif
li r10,MSR_RI
mtmsrd r10,1 /* Set RI (EE=0) */
b \label
#endif
.endm
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
/* /*
* If hv is possible, interrupts come into to the hv version * If hv is possible, interrupts come into to the hv version
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment