Commit f19fd335 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Greg Kroah-Hartman

Staging: rtl8187se: remove CONFIG_RTL8185B ifdefs

CONFIG_RTL8185B is defined in drivers/staging/rtl8187se/r8180_hw.h.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 5474405f
...@@ -4,7 +4,6 @@ ...@@ -4,7 +4,6 @@
#EXTRA_CFLAGS += -std=gnu89 #EXTRA_CFLAGS += -std=gnu89
#EXTRA_CFLAGS += -O2 #EXTRA_CFLAGS += -O2
#CC = gcc #CC = gcc
#CFLAGS += -DCONFIG_RTL8185B
#added for EeePC testing #added for EeePC testing
EXTRA_CFLAGS += -DENABLE_IPS EXTRA_CFLAGS += -DENABLE_IPS
......
...@@ -64,7 +64,6 @@ ...@@ -64,7 +64,6 @@
#define DEFAULT_RETRY_DATA 7 #define DEFAULT_RETRY_DATA 7
#define PRISM_HDR_SIZE 64 #define PRISM_HDR_SIZE 64
#ifdef CONFIG_RTL8185B
#define MGNT_QUEUE 0 #define MGNT_QUEUE 0
#define BK_QUEUE 1 #define BK_QUEUE 1
...@@ -199,7 +198,6 @@ typedef union _ThreeWire{ ...@@ -199,7 +198,6 @@ typedef union _ThreeWire{
u16 longData; u16 longData;
}ThreeWireReg; }ThreeWireReg;
#endif
typedef struct buffer typedef struct buffer
{ {
...@@ -659,7 +657,6 @@ typedef struct r8180_priv ...@@ -659,7 +657,6 @@ typedef struct r8180_priv
short ack_tx_to_ieee; short ack_tx_to_ieee;
u8 PowerProfile; u8 PowerProfile;
#ifdef CONFIG_RTL8185B
u32 CSMethod; u32 CSMethod;
u8 cck_txpwr_base; u8 cck_txpwr_base;
u8 ofdm_txpwr_base; u8 ofdm_txpwr_base;
...@@ -675,7 +672,6 @@ typedef struct r8180_priv ...@@ -675,7 +672,6 @@ typedef struct r8180_priv
u32 IntrMask; u32 IntrMask;
struct ChnlAccessSetting ChannelAccessSetting; struct ChnlAccessSetting ChannelAccessSetting;
#endif
}r8180_priv; }r8180_priv;
#define MANAGE_PRIORITY 0 #define MANAGE_PRIORITY 0
......
...@@ -28,11 +28,9 @@ ...@@ -28,11 +28,9 @@
#define RFCHIPID_MAXIM 4 #define RFCHIPID_MAXIM 4
#define RFCHIPID_GCT 5 #define RFCHIPID_GCT 5
#define RFCHIPID_RTL8225 9 #define RFCHIPID_RTL8225 9
#ifdef CONFIG_RTL8185B
#define RF_ZEBRA2 11 #define RF_ZEBRA2 11
#define EPROM_TXPW_BASE 0x05 #define EPROM_TXPW_BASE 0x05
#define RF_ZEBRA4 12 #define RF_ZEBRA4 12
#endif
#define RFCHIPID_RTL8255 0xa #define RFCHIPID_RTL8255 0xa
#define RF_PARAM 0x19 #define RF_PARAM 0x19
#define RF_PARAM_DIGPHY_SHIFT 0 #define RF_PARAM_DIGPHY_SHIFT 0
......
This diff is collapsed.
...@@ -1315,14 +1315,12 @@ SetAntenna8185( ...@@ -1315,14 +1315,12 @@ SetAntenna8185(
{ {
case RF_ZEBRA2: case RF_ZEBRA2:
case RF_ZEBRA4: case RF_ZEBRA4:
#ifdef CONFIG_RTL8185B
// Mac register, main antenna // Mac register, main antenna
write_nic_byte(dev, ANTSEL, 0x03); write_nic_byte(dev, ANTSEL, 0x03);
//base band //base band
write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna. write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna.
write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna. write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna.
#endif
bAntennaSwitched = true; bAntennaSwitched = true;
break; break;
...@@ -1338,13 +1336,11 @@ SetAntenna8185( ...@@ -1338,13 +1336,11 @@ SetAntenna8185(
{ {
case RF_ZEBRA2: case RF_ZEBRA2:
case RF_ZEBRA4: case RF_ZEBRA4:
#ifdef CONFIG_RTL8185B
// Mac register, aux antenna // Mac register, aux antenna
write_nic_byte(dev, ANTSEL, 0x00); write_nic_byte(dev, ANTSEL, 0x00);
//base band //base band
write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna. write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna.
write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna. write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna.
#endif
bAntennaSwitched = true; bAntennaSwitched = true;
break; break;
......
...@@ -20,7 +20,6 @@ ...@@ -20,7 +20,6 @@
#ifndef R8180_HW #ifndef R8180_HW
#define R8180_HW #define R8180_HW
#define CONFIG_RTL8185B //support for rtl8185B, xiong-2006-11-15
#define BIT0 0x00000001 #define BIT0 0x00000001
#define BIT1 0x00000002 #define BIT1 0x00000002
...@@ -250,7 +249,6 @@ ...@@ -250,7 +249,6 @@
#define CR 0x0037 #define CR 0x0037
#ifdef CONFIG_RTL8185B
#define RF_SW_CONFIG 0x8 // store data which is transmitted to RF for driver #define RF_SW_CONFIG 0x8 // store data which is transmitted to RF for driver
#define RF_SW_CFG_SI BIT1 #define RF_SW_CFG_SI BIT1
#define PIFS 0x2C // PCF InterFrame Spacing Timer Setting. #define PIFS 0x2C // PCF InterFrame Spacing Timer Setting.
...@@ -260,18 +258,6 @@ ...@@ -260,18 +258,6 @@
#define IMR 0x006C #define IMR 0x006C
#define ISR 0x003C #define ISR 0x003C
#else
#define BRSR 0x002C
#define BRSR_END 0x002D
/* 0x0034 - 0x0034 - reserved */
#define EIFS 0x0035
#define IMR 0x003C
#define IMR_END 0x003D
#define ISR 0x003E
#define ISR_END 0x003F
#endif
#define TCR 0x0040 #define TCR 0x0040
#define TCR_END 0x0043 #define TCR_END 0x0043
...@@ -298,7 +284,6 @@ ...@@ -298,7 +284,6 @@
#define CONFIG3 0x0059 #define CONFIG3 0x0059
#define CONFIG4 0x005A #define CONFIG4 0x005A
#ifdef CONFIG_RTL8185B
// SD3 szuyitasi: Mac0x57= CC -> B0 Mac0x60= D1 -> C6 // SD3 szuyitasi: Mac0x57= CC -> B0 Mac0x60= D1 -> C6
// Mac0x60 = 0x000004C6 power save parameters // Mac0x60 = 0x000004C6 power save parameters
#define ANAPARM_ASIC_ON 0xB0054D00 #define ANAPARM_ASIC_ON 0xB0054D00
...@@ -306,7 +291,6 @@ ...@@ -306,7 +291,6 @@
#define ANAPARM_ON ANAPARM_ASIC_ON #define ANAPARM_ON ANAPARM_ASIC_ON
#define ANAPARM2_ON ANAPARM2_ASIC_ON #define ANAPARM2_ON ANAPARM2_ASIC_ON
#endif
#define TESTR 0x005B #define TESTR 0x005B
...@@ -461,12 +445,7 @@ ...@@ -461,12 +445,7 @@
#define FER 0x00F0 #define FER 0x00F0
#define FER_END 0x00F3 #define FER_END 0x00F3
#ifdef CONFIG_RTL8185B
#define FEMR 0x1D4 // Function Event Mask register #define FEMR 0x1D4 // Function Event Mask register
#else
#define FEMR 0x00F4
#define FEMR_END 0x00F7
#endif
#define FPSR 0x00F8 #define FPSR 0x00F8
#define FPSR_END 0x00FB #define FPSR_END 0x00FB
...@@ -496,7 +475,6 @@ ...@@ -496,7 +475,6 @@
#define CR_TE ((1<< 2)) #define CR_TE ((1<< 2))
#define CR_MulRW ((1<< 0)) #define CR_MulRW ((1<< 0))
#ifdef CONFIG_RTL8185B
#define IMR_Dot11hInt ((1<< 25)) // 802.11h Measurement Interrupt #define IMR_Dot11hInt ((1<< 25)) // 802.11h Measurement Interrupt
#define IMR_BcnDmaInt ((1<< 24)) // Beacon DMA Interrupt // What differenct between BcnDmaInt and BcnInt??? #define IMR_BcnDmaInt ((1<< 24)) // Beacon DMA Interrupt // What differenct between BcnDmaInt and BcnInt???
#define IMR_WakeInt ((1<< 23)) // Wake Up Interrupt #define IMR_WakeInt ((1<< 23)) // Wake Up Interrupt
...@@ -559,49 +537,12 @@ ...@@ -559,49 +537,12 @@
#define ISR_TimeOut ISR_TimeOut1 #define ISR_TimeOut ISR_TimeOut1
#define ISR_RXFOVW ISR_FOVW #define ISR_RXFOVW ISR_FOVW
#else
#define IMR_TXFOVW ((1<<15))
#define IMR_TimeOut ((1<<14))
#define IMR_BcnInt ((1<<13))
#define IMR_ATIMInt ((1<<12))
#define IMR_TBDER ((1<<11))
#define IMR_TBDOK ((1<<10))
#define IMR_THPDER ((1<< 9))
#define IMR_THPDOK ((1<< 8))
#define IMR_TNPDER ((1<< 7))
#define IMR_TNPDOK ((1<< 6))
#define IMR_RXFOVW ((1<< 5))
#define IMR_RDU ((1<< 4))
#define IMR_TLPDER ((1<< 3))
#define IMR_TLPDOK ((1<< 2))
#define IMR_RER ((1<< 1))
#define IMR_ROK ((1<< 0))
#define ISR_TXFOVW ((1<<15))
#define ISR_TimeOut ((1<<14))
#define ISR_BcnInt ((1<<13))
#define ISR_ATIMInt ((1<<12))
#define ISR_TBDER ((1<<11))
#define ISR_TBDOK ((1<<10))
#define ISR_THPDER ((1<< 9))
#define ISR_THPDOK ((1<< 8))
#define ISR_TNPDER ((1<< 7))
#define ISR_TNPDOK ((1<< 6))
#define ISR_RXFOVW ((1<< 5))
#define ISR_RDU ((1<< 4))
#define ISR_TLPDER ((1<< 3))
#define ISR_TLPDOK ((1<< 2))
#define ISR_RER ((1<< 1))
#define ISR_ROK ((1<< 0))
#endif
#define HW_VERID_R8180_F 3 #define HW_VERID_R8180_F 3
#define HW_VERID_R8180_ABCD 2 #define HW_VERID_R8180_ABCD 2
#define HW_VERID_R8185_ABC 4 #define HW_VERID_R8185_ABC 4
#define HW_VERID_R8185_D 5 #define HW_VERID_R8185_D 5
#ifdef CONFIG_RTL8185B
#define HW_VERID_R8185B_B 6 #define HW_VERID_R8185B_B 6
#endif
#define TCR_CWMIN ((1<<31)) #define TCR_CWMIN ((1<<31))
#define TCR_SWSEQ ((1<<30)) #define TCR_SWSEQ ((1<<30))
...@@ -759,7 +700,6 @@ ...@@ -759,7 +700,6 @@
#define FFER_INTR ((1<<15)) #define FFER_INTR ((1<<15))
#define FFER_GWAKE ((1<< 4)) #define FFER_GWAKE ((1<< 4))
#ifdef CONFIG_RTL8185B
// Three wire mode. // Three wire mode.
#define SW_THREE_WIRE 0 #define SW_THREE_WIRE 0
#define HW_THREE_WIRE 2 #define HW_THREE_WIRE 2
...@@ -933,6 +873,5 @@ ...@@ -933,6 +873,5 @@
//YJ,add for Country IE, 080630 //YJ,add for Country IE, 080630
#define EEPROM_COUNTRY_CODE 0x2E #define EEPROM_COUNTRY_CODE 0x2E
//YJ,add,080630,end //YJ,add,080630,end
#endif
#endif #endif
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
#define RTL8225_ANAPARAM_SLEEP 0xa00bab59 #define RTL8225_ANAPARAM_SLEEP 0xa00bab59
#define RTL8225_ANAPARAM2_SLEEP 0x840dec11 #define RTL8225_ANAPARAM2_SLEEP 0x840dec11
#ifdef CONFIG_RTL8185B
void rtl8225z2_rf_init(struct net_device *dev); void rtl8225z2_rf_init(struct net_device *dev);
void rtl8225z2_rf_set_chan(struct net_device *dev,short ch); void rtl8225z2_rf_set_chan(struct net_device *dev,short ch);
void rtl8225z2_rf_close(struct net_device *dev); void rtl8225z2_rf_close(struct net_device *dev);
...@@ -30,7 +29,6 @@ void rtl8225_host_usb_init(struct net_device *dev); ...@@ -30,7 +29,6 @@ void rtl8225_host_usb_init(struct net_device *dev);
void write_rtl8225(struct net_device *dev, u8 adr, u16 data); void write_rtl8225(struct net_device *dev, u8 adr, u16 data);
void RF_WriteReg(struct net_device *dev, u8 offset, u32 data); void RF_WriteReg(struct net_device *dev, u8 offset, u32 data);
u32 RF_ReadReg(struct net_device *dev, u8 offset); u32 RF_ReadReg(struct net_device *dev, u8 offset);
#endif
void rtl8225_rf_init(struct net_device *dev); void rtl8225_rf_init(struct net_device *dev);
void rtl8225_rf_set_chan(struct net_device *dev,short ch); void rtl8225_rf_set_chan(struct net_device *dev,short ch);
void rtl8225_rf_close(struct net_device *dev); void rtl8225_rf_close(struct net_device *dev);
......
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
#include "ieee80211/dot11d.h" #include "ieee80211/dot11d.h"
#ifdef CONFIG_RTL8185B
extern u8 rtl8225_agc[]; extern u8 rtl8225_agc[];
...@@ -574,7 +573,6 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch) ...@@ -574,7 +573,6 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
max_ofdm_power_level = 25; // 12 -> 25 max_ofdm_power_level = 25; // 12 -> 25
min_ofdm_power_level = 10; min_ofdm_power_level = 10;
#ifdef CONFIG_RTL8185B
if(cck_power_level > 35) if(cck_power_level > 35)
{ {
...@@ -587,7 +585,6 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch) ...@@ -587,7 +585,6 @@ void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
//printk("CCK TX power is %x\n", (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level])); //printk("CCK TX power is %x\n", (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]));
force_pci_posting(dev); force_pci_posting(dev);
mdelay(1); mdelay(1);
#endif
/* OFDM power setting */ /* OFDM power setting */
// Old: // Old:
// if(ofdm_power_level > max_ofdm_power_level) // if(ofdm_power_level > max_ofdm_power_level)
...@@ -1536,5 +1533,4 @@ void rtl8225z4_rf_wakeup(struct net_device *dev) ...@@ -1536,5 +1533,4 @@ void rtl8225z4_rf_wakeup(struct net_device *dev)
//printk("=========>%s()\n", __func__); //printk("=========>%s()\n", __func__);
MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS); MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
} }
#endif
...@@ -34,7 +34,6 @@ Major Change History: ...@@ -34,7 +34,6 @@ Major Change History:
#include "ieee80211/dot11d.h" #include "ieee80211/dot11d.h"
#ifdef CONFIG_RTL8185B
//#define CONFIG_RTL8180_IO_MAP //#define CONFIG_RTL8180_IO_MAP
...@@ -3139,4 +3138,3 @@ void rtl8185b_tx_enable(struct net_device *dev) ...@@ -3139,4 +3138,3 @@ void rtl8185b_tx_enable(struct net_device *dev)
} }
#endif
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