Commit f1c0bb74 authored by Matti Gottlieb's avatar Matti Gottlieb Committed by Luca Coelho

iwlwifi: Read the correct addresses when getting the crf id

The original implementation checked the HW family, and as a result
of that used different addresses for the prph registers.

The old HWs addresses start with 0xa****** and the newer
ones start with 0xd******.

For this there are iwl_read/write_umac_prph functions that just add the

diff in the address automatically (in this case 0x300000), so the code will
be common for all HWs

In the original implementation the address given already had the 0xd******
causing the address to become 0x10***** (after adding the offset)

Change the registers to start with 0xa*****.
Signed-off-by: default avatarMatti Gottlieb <matti.gottlieb@intel.com>
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
Link: https://lore.kernel.org/r/iwlwifi.20211210090244.db2722547eb2.I03dce63698befc2fd9105111c3015b8d6e36868a@changeidSigned-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent 2b0ceda9
......@@ -2110,7 +2110,7 @@ static u32 iwl_dump_ini_info(struct iwl_fw_runtime *fwrt,
*/
hw_type = CSR_HW_REV_TYPE(fwrt->trans->hw_rev);
if (hw_type == IWL_AX210_HW_TYPE) {
u32 prph_val = iwl_read_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR_GEN2);
u32 prph_val = iwl_read_umac_prph(fwrt->trans, WFPM_OTP_CFG1_ADDR);
u32 is_jacket = !!(prph_val & WFPM_OTP_CFG1_IS_JACKET_BIT);
u32 is_cdb = !!(prph_val & WFPM_OTP_CFG1_IS_CDB_BIT);
u32 masked_bits = is_jacket | (is_cdb << 1);
......
......@@ -347,9 +347,7 @@
#define RADIO_REG_SYS_MANUAL_DFT_0 0xAD4078
#define RFIC_REG_RD 0xAD0470
#define WFPM_CTRL_REG 0xA03030
#define WFPM_CTRL_REG_GEN2 0xd03030
#define WFPM_OTP_CFG1_ADDR 0x00a03098
#define WFPM_OTP_CFG1_ADDR_GEN2 0x00d03098
#define WFPM_OTP_CFG1_IS_JACKET_BIT BIT(4)
#define WFPM_OTP_CFG1_IS_CDB_BIT BIT(5)
......
......@@ -1272,22 +1272,14 @@ static const struct iwl_dev_info iwl_dev_info_table[] = {
static int get_crf_id(struct iwl_trans *iwl_trans)
{
int ret = 0;
u32 wfpm_ctrl_addr;
u32 wfpm_otp_cfg_addr;
u32 sd_reg_ver_addr;
u32 cdb = 0;
u32 val;
if (iwl_trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
wfpm_ctrl_addr = WFPM_CTRL_REG_GEN2;
wfpm_otp_cfg_addr = WFPM_OTP_CFG1_ADDR_GEN2;
if (iwl_trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
sd_reg_ver_addr = SD_REG_VER_GEN2;
/* Qu/Pu families have other addresses */
} else {
wfpm_ctrl_addr = WFPM_CTRL_REG;
wfpm_otp_cfg_addr = WFPM_OTP_CFG1_ADDR;
else
sd_reg_ver_addr = SD_REG_VER;
}
if (!iwl_trans_grab_nic_access(iwl_trans)) {
IWL_ERR(iwl_trans, "Failed to grab nic access before reading crf id\n");
......@@ -1296,15 +1288,15 @@ static int get_crf_id(struct iwl_trans *iwl_trans)
}
/* Enable access to peripheral registers */
val = iwl_read_umac_prph_no_grab(iwl_trans, wfpm_ctrl_addr);
val = iwl_read_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG);
val |= ENABLE_WFPM;
iwl_write_umac_prph_no_grab(iwl_trans, wfpm_ctrl_addr, val);
iwl_write_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG, val);
/* Read crf info */
val = iwl_read_prph_no_grab(iwl_trans, sd_reg_ver_addr);
/* Read cdb info (also contains the jacket info if needed in the future */
cdb = iwl_read_umac_prph_no_grab(iwl_trans, wfpm_otp_cfg_addr);
cdb = iwl_read_umac_prph_no_grab(iwl_trans, WFPM_OTP_CFG1_ADDR);
/* Map between crf id to rf id */
switch (REG_CRF_ID_TYPE(val)) {
......
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