Commit f1e86cec authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Joonas Lahtinen

drm/i915: Update DMC firmware load error messages

Some of the error messages from DMC load were too generic and
may be confusing for the user. Lets explicitly add DMC words there.
Also as homepage of DMC firmware is same as for the GuC and Huc,
lets reuse URL definition.
Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-12-michal.wajdeczko@intel.com
parent 1e913d27
...@@ -52,10 +52,6 @@ MODULE_FIRMWARE(I915_CSR_SKL); ...@@ -52,10 +52,6 @@ MODULE_FIRMWARE(I915_CSR_SKL);
MODULE_FIRMWARE(I915_CSR_BXT); MODULE_FIRMWARE(I915_CSR_BXT);
#define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) #define BXT_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define FIRMWARE_URL "https://01.org/linuxgraphics/downloads/firmware"
#define CSR_MAX_FW_SIZE 0x2FFF #define CSR_MAX_FW_SIZE 0x2FFF
#define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF #define CSR_DEFAULT_FW_OFFSET 0xFFFFFFFF
...@@ -291,7 +287,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -291,7 +287,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
css_header = (struct intel_css_header *)fw->data; css_header = (struct intel_css_header *)fw->data;
if (sizeof(struct intel_css_header) != if (sizeof(struct intel_css_header) !=
(css_header->header_len * 4)) { (css_header->header_len * 4)) {
DRM_ERROR("Firmware has wrong CSS header length %u bytes\n", DRM_ERROR("DMC firmware has wrong CSS header length "
"(%u bytes)\n",
(css_header->header_len * 4)); (css_header->header_len * 4));
return NULL; return NULL;
} }
...@@ -315,7 +312,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -315,7 +312,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
if (csr->version != required_version) { if (csr->version != required_version) {
DRM_INFO("Refusing to load DMC firmware v%u.%u," DRM_INFO("Refusing to load DMC firmware v%u.%u,"
" please use v%u.%u [" FIRMWARE_URL "].\n", " please use v%u.%u\n",
CSR_VERSION_MAJOR(csr->version), CSR_VERSION_MAJOR(csr->version),
CSR_VERSION_MINOR(csr->version), CSR_VERSION_MINOR(csr->version),
CSR_VERSION_MAJOR(required_version), CSR_VERSION_MAJOR(required_version),
...@@ -330,7 +327,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -330,7 +327,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
&fw->data[readcount]; &fw->data[readcount];
if (sizeof(struct intel_package_header) != if (sizeof(struct intel_package_header) !=
(package_header->header_len * 4)) { (package_header->header_len * 4)) {
DRM_ERROR("Firmware has wrong package header length %u bytes\n", DRM_ERROR("DMC firmware has wrong package header length "
"(%u bytes)\n",
(package_header->header_len * 4)); (package_header->header_len * 4));
return NULL; return NULL;
} }
...@@ -351,7 +349,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -351,7 +349,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
dmc_offset = package_header->fw_info[i].offset; dmc_offset = package_header->fw_info[i].offset;
} }
if (dmc_offset == CSR_DEFAULT_FW_OFFSET) { if (dmc_offset == CSR_DEFAULT_FW_OFFSET) {
DRM_ERROR("Firmware not supported for %c stepping\n", DRM_ERROR("DMC firmware not supported for %c stepping\n",
si->stepping); si->stepping);
return NULL; return NULL;
} }
...@@ -360,7 +358,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -360,7 +358,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
/* Extract dmc_header information. */ /* Extract dmc_header information. */
dmc_header = (struct intel_dmc_header *)&fw->data[readcount]; dmc_header = (struct intel_dmc_header *)&fw->data[readcount];
if (sizeof(struct intel_dmc_header) != (dmc_header->header_len)) { if (sizeof(struct intel_dmc_header) != (dmc_header->header_len)) {
DRM_ERROR("Firmware has wrong dmc header length %u bytes\n", DRM_ERROR("DMC firmware has wrong dmc header length "
"(%u bytes)\n",
(dmc_header->header_len)); (dmc_header->header_len));
return NULL; return NULL;
} }
...@@ -368,7 +367,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -368,7 +367,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
/* Cache the dmc header info. */ /* Cache the dmc header info. */
if (dmc_header->mmio_count > ARRAY_SIZE(csr->mmioaddr)) { if (dmc_header->mmio_count > ARRAY_SIZE(csr->mmioaddr)) {
DRM_ERROR("Firmware has wrong mmio count %u\n", DRM_ERROR("DMC firmware has wrong mmio count %u\n",
dmc_header->mmio_count); dmc_header->mmio_count);
return NULL; return NULL;
} }
...@@ -376,7 +375,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -376,7 +375,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
for (i = 0; i < dmc_header->mmio_count; i++) { for (i = 0; i < dmc_header->mmio_count; i++) {
if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE || if (dmc_header->mmioaddr[i] < CSR_MMIO_START_RANGE ||
dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) { dmc_header->mmioaddr[i] > CSR_MMIO_END_RANGE) {
DRM_ERROR(" Firmware has wrong mmio address 0x%x\n", DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n",
dmc_header->mmioaddr[i]); dmc_header->mmioaddr[i]);
return NULL; return NULL;
} }
...@@ -387,7 +386,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, ...@@ -387,7 +386,7 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
/* fw_size is in dwords, so multiplied by 4 to convert into bytes. */ /* fw_size is in dwords, so multiplied by 4 to convert into bytes. */
nbytes = dmc_header->fw_size * 4; nbytes = dmc_header->fw_size * 4;
if (nbytes > CSR_MAX_FW_SIZE) { if (nbytes > CSR_MAX_FW_SIZE) {
DRM_ERROR("CSR firmware too big (%u) bytes\n", nbytes); DRM_ERROR("DMC firmware too big (%u bytes)\n", nbytes);
return NULL; return NULL;
} }
csr->dmc_fw_size = dmc_header->fw_size; csr->dmc_fw_size = dmc_header->fw_size;
...@@ -425,9 +424,11 @@ static void csr_load_work_fn(struct work_struct *work) ...@@ -425,9 +424,11 @@ static void csr_load_work_fn(struct work_struct *work)
CSR_VERSION_MINOR(csr->version)); CSR_VERSION_MINOR(csr->version));
} else { } else {
dev_notice(dev_priv->drm.dev, dev_notice(dev_priv->drm.dev,
"Failed to load DMC firmware" "Failed to load DMC firmware %s."
" [" FIRMWARE_URL "]," " Disabling runtime power management.\n",
" disabling runtime power management.\n"); csr->fw_path);
dev_notice(dev_priv->drm.dev, "DMC firmware homepage: %s",
INTEL_UC_FIRMWARE_URL);
} }
release_firmware(fw); release_firmware(fw);
......
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
struct drm_i915_private; struct drm_i915_private;
/* Home of GuC, HuC and DMC firmwares */
#define INTEL_UC_FIRMWARE_URL "https://01.org/linuxgraphics/downloads/firmware" #define INTEL_UC_FIRMWARE_URL "https://01.org/linuxgraphics/downloads/firmware"
enum intel_uc_fw_status { enum intel_uc_fw_status {
......
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