Merge tag 'at91-dt2' of git://github.com/at91linux/linux-at91 into next/dt

From Nicolas Ferre:
Second DT pull-request for 3.14
- now that PWM driver is on its way to mainline,
  we can integrate the DT entries
- As an example, use PWM for at91sam9m10g45ek leds
- Addition of clock specification for newly introduced
  crypto DT entries

* tag 'at91-dt2' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: add clk properties to sama5d3 TDES device node
  ARM: at91/dt: add clk properties to sama5d3 AES device node
  ARM: at91/dt: add clk properties to sama5d3 SHA device node
  ARM: at91: at91sam9m10g45ek: switch to PWM leds
  ARM: at91: add PWM device node
Signed-off-by: Olof Johansson <olof@lixom.net>

arch/arm/boot/dts/at91sam9263.dtsi

@@ -30,6 +30,7 @@ aliases {
 		i2c0 = &i2c0;
 		ssc0 = &ssc0;
 		ssc1 = &ssc1;
+		pwm0 = &pwm0;
 	};
 	cpus {
 		#address-cells = <0>;
@@ -575,6 +576,14 @@ spi1: spi@fffa8000 {
 				pinctrl-0 = <&pinctrl_spi1>;
 				status = "disabled";
 			};
+
+			pwm0: pwm@fffb8000 {
+				compatible = "atmel,at91sam9rl-pwm";
+				reg = <0xfffb8000 0x300>;
+				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
+				#pwm-cells = <3>;
+				status = "disabled";
+			};
 		};
 
 		fb0: fb@0x00700000 {

arch/arm/boot/dts/at91sam9g45.dtsi

@@ -37,6 +37,7 @@ aliases {
 		i2c1 = &i2c1;
 		ssc0 = &ssc0;
 		ssc1 = &ssc1;
+		pwm0 = &pwm0;
 	};
 	cpus {
 		#address-cells = <0>;
@@ -670,6 +671,14 @@ trigger@3 {
 				};
 			};
 
+			pwm0: pwm@fffb8000 {
+				compatible = "atmel,at91sam9rl-pwm";
+				reg = <0xfffb8000 0x300>;
+				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+				#pwm-cells = <3>;
+				status = "disabled";
+			};
+
 			mmc0: mmc@fff80000 {
 				compatible = "atmel,hsmci";
 				reg = <0xfff80000 0x600>;

arch/arm/boot/dts/at91sam9m10g45ek.dts

@@ -105,6 +105,14 @@ pinctrl_board_mmc1: mmc1-board {
 							 AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD29 gpio WP pin pull up */
 					};
 				};
+
+				pwm0 {
+					pinctrl_pwm_leds: pwm-led {
+						atmel,pins =
+							<AT91_PIOD 0  AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PD0 periph B */
+							 AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PD31 periph B */
+					};
+				};
 			};
 
 			spi0: spi@fffa4000{
@@ -121,6 +129,13 @@ usb2: gadget@fff78000 {
 				atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
 				status = "okay";
 			};
+
+			pwm0: pwm@fffb8000 {
+				status = "okay";
+
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_pwm_leds>;
+			};
 		};
 
 		fb0: fb@0x00500000 {
@@ -194,16 +209,22 @@ d8 {
 			gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "heartbeat";
 		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
 
 		d6 {
 			label = "d6";
-			gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
+			pwms = <&pwm0 3 5000 0>;
+			max-brightness = <255>;
 			linux,default-trigger = "nand-disk";
 		};
 
 		d7 {
 			label = "d7";
-			gpios = <&pioD 31 GPIO_ACTIVE_LOW>;
+			pwms = <&pwm0 1 5000 0>;
+			max-brightness = <255>;
 			linux,default-trigger = "mmc0";
 		};
 	};

arch/arm/boot/dts/at91sam9n12.dtsi

@@ -33,6 +33,7 @@ aliases {
 		i2c0 = &i2c0;
 		i2c1 = &i2c1;
 		ssc0 = &ssc0;
+		pwm0 = &pwm0;
 	};
 	cpus {
 		#address-cells = <0>;
@@ -542,6 +543,14 @@ watchdog@fffffe40 {
 				reg = <0xfffffe40 0x10>;
 				status = "disabled";
 			};
+
+			pwm0: pwm@f8034000 {
+				compatible = "atmel,at91sam9rl-pwm";
+				reg = <0xf8034000 0x300>;
+				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+				#pwm-cells = <3>;
+				status = "disabled";
+			};
 		};
 
 		nand0: nand@40000000 {

arch/arm/boot/dts/at91sam9x5.dtsi

@@ -35,6 +35,7 @@ aliases {
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		ssc0 = &ssc0;
+		pwm0 = &pwm0;
 	};
 	cpus {
 		#address-cells = <0>;
@@ -762,6 +763,14 @@ rtc@fffffeb0 {
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 				status = "disabled";
 			};
+
+			pwm0: pwm@f8034000 {
+				compatible = "atmel,at91sam9rl-pwm";
+				reg = <0xf8034000 0x300>;
+				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
+				#pwm-cells = <3>;
+				status = "disabled";
+			};
 		};
 
 		nand0: nand@40000000 {

arch/arm/boot/dts/sama5d3.dtsi

@@ -37,6 +37,7 @@ aliases {
 		i2c2 = &i2c2;
 		ssc0 = &ssc0;
 		ssc1 = &ssc1;
+		pwm0 = &pwm0;
 	};
 	cpus {
 		#address-cells = <1>;
@@ -179,6 +180,15 @@ usart1: serial@f0020000 {
 				status = "disabled";
 			};
 
+			pwm0: pwm@f002c000 {
+				compatible = "atmel,sama5d3-pwm";
+				reg = <0xf002c000 0x300>;
+				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
+				#pwm-cells = <3>;
+				clocks = <&pwm_clk>;
+				status = "disabled";
+			};
+
 			isi: isi@f0034000 {
 				compatible = "atmel,at91sam9g45-isi";
 				reg = <0xf0034000 0x4000>;
@@ -340,6 +350,8 @@ sha@f8034000 {
 				interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
 				dma-names = "tx";
+				clocks = <&sha_clk>;
+				clock-names = "sha_clk";
 			};
 
 			aes@f8038000 {
@@ -349,6 +361,8 @@ aes@f8038000 {
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
 				       <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
 				dma-names = "tx", "rx";
+				clocks = <&aes_clk>;
+				clock-names = "aes_clk";
 			};
 
 			tdes@f803c000 {
@@ -358,6 +372,8 @@ tdes@f803c000 {
 				dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
 				       <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
 				dma-names = "tx", "rx";
+				clocks = <&tdes_clk>;
+				clock-names = "tdes_clk";
 			};
 
 			dma0: dma-controller@ffffe600 {