Commit f3d21632 authored by Paul Mackerras's avatar Paul Mackerras Committed by Linus Torvalds

[PATCH] PPC64 Replace cmp instructions with cmpw/cmpd

There were a few places in assembly code in the ppc64 part of the
kernel where we were using the old forms of the compare instruction
(cmp, cmpi, cmpl, cmpli) which don't specify the operand size (word or
doubleword).  These have been accepted for a long time for backward
compatibility with the old POWER architecture (and defaulted to a
32-bit comparison) but are now being rejected by the latest versions
of binutils.  Some of them were actual bugs in that they were on
things which were actually 64-bit values such as pointers (not that
any of them actually caused a problem in practice).

This patch replaces cmp{,l}{,i} with cmp{,l}[wd]{,i} as appropriate.
The original patch was from Segher Boessenkool, slightly modified by
me.
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 82cdb292
......@@ -122,7 +122,7 @@ SystemCall_common:
andi. r11,r10,_TIF_SYSCALL_T_OR_A
bne- syscall_dotrace
syscall_dotrace_cont:
cmpli 0,r0,NR_syscalls
cmpldi 0,r0,NR_syscalls
bge- syscall_enosys
system_call: /* label this so stack traces look sane */
......@@ -204,7 +204,7 @@ syscall_enosys:
syscall_error:
lbz r11,TI_SC_NOERR(r12)
cmpi 0,r11,0
cmpwi 0,r11,0
bne- syscall_error_cont
neg r3,r3
oris r5,r5,0x1000 /* Set SO bit in CR */
......
......@@ -46,7 +46,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
/* Now check if user or arch enabled NAP mode */
LOADBASE(r3,powersave_nap)
lwz r4,powersave_nap@l(r3)
cmpi 0,r4,0
cmpwi 0,r4,0
beqlr
/* Clear MSR:EE */
......
......@@ -670,7 +670,7 @@ _GLOBAL(kernel_thread)
li r4,0 /* new sp (unused) */
li r0,__NR_clone
sc
cmpi 0,r3,0 /* parent or child? */
cmpdi 0,r3,0 /* parent or child? */
bne 1f /* return if parent */
li r0,0
stdu r0,-STACK_FRAME_OVERHEAD(r1)
......
......@@ -92,19 +92,19 @@ _GLOBAL(csum_partial)
adde r5,r5,r6
bdnz 2b
andi. r4,r4,7 /* compute bytes left to sum after doublewords */
3: cmpi 0,r4,4 /* is at least a full word left? */
3: cmpwi 0,r4,4 /* is at least a full word left? */
blt 4f
lwz r6,8(r3) /* sum this word */
addi r3,r3,4
subi r4,r4,4
adde r5,r5,r6
4: cmpi 0,r4,2 /* is at least a halfword left? */
4: cmpwi 0,r4,2 /* is at least a halfword left? */
blt+ 5f
lhz r6,8(r3) /* sum this halfword */
addi r3,r3,2
subi r4,r4,2
adde r5,r5,r6
5: cmpi 0,r4,1 /* is at least a byte left? */
5: cmpwi 0,r4,1 /* is at least a byte left? */
bne+ 6f
lbz r6,8(r3) /* sum this byte */
slwi r6,r6,8 /* this byte is assumed to be the upper byte of a halfword */
......@@ -150,7 +150,7 @@ _GLOBAL(csum_partial_copy_generic)
adde r0,r0,r6
bdnz 82b
andi. r5,r5,3
3: cmpi 0,r5,2
3: cmpwi 0,r5,2
blt+ 4f
83: lhz r6,4(r3)
addi r3,r3,2
......@@ -158,7 +158,7 @@ _GLOBAL(csum_partial_copy_generic)
93: sth r6,4(r4)
addi r4,r4,2
adde r0,r0,r6
4: cmpi 0,r5,1
4: cmpwi 0,r5,1
bne+ 5f
84: lbz r6,4(r3)
94: stb r6,4(r4)
......@@ -198,7 +198,7 @@ src_error_3:
bdnz 97b
.globl src_error
src_error:
cmpi 0,r7,0
cmpdi 0,r7,0
beq 1f
li r6,-EFAULT
stw r6,0(r7)
......@@ -207,7 +207,7 @@ src_error:
.globl dst_error
dst_error:
cmpi 0,r8,0
cmpdi 0,r8,0
beq 1f
li r6,-EFAULT
stw r6,0(r8)
......
......@@ -172,9 +172,9 @@ htab_insert_pte:
li r9,0
_GLOBAL(htab_call_hpte_insert1)
bl . /* Will be patched by htab_finish_init() */
cmpi 0,r3,0
cmpdi 0,r3,0
bge htab_pte_insert_ok /* Insertion successful */
cmpi 0,r3,-2 /* Critical failure */
cmpdi 0,r3,-2 /* Critical failure */
beq- htab_pte_insert_failure
/* Now try secondary slot */
......@@ -194,9 +194,9 @@ _GLOBAL(htab_call_hpte_insert1)
li r9,0
_GLOBAL(htab_call_hpte_insert2)
bl . /* Will be patched by htab_finish_init() */
cmpi 0,r3,0
cmpdi 0,r3,0
bge+ htab_pte_insert_ok /* Insertion successful */
cmpi 0,r3,-2 /* Critical failure */
cmpdi 0,r3,-2 /* Critical failure */
beq- htab_pte_insert_failure
/* Both are full, we need to evict something */
......
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