Commit f4fac416 authored by Laurent Morichetti's avatar Laurent Morichetti Committed by Alex Deucher

drm/amdkfd: Clear the VALU exception state in the trap handler

The trap handler could be entered with pending VALU exceptions, so
clear the exception state before issuing vector instructions.
Reviewed-by: default avatarJay Cornwall <jay.cornwall@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarLaurent Morichetti <laurent.morichetti@amd.com>
Tested-by: default avatarLancelot Six <lancelot.six@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8a1de314
......@@ -369,6 +369,12 @@ L_SLEEP:
s_or_b32 s_save_pc_hi, s_save_pc_hi, s_save_tmp
#if NO_SQC_STORE
#if ASIC_FAMILY <= CHIP_SIENNA_CICHLID
// gfx10: If there was a VALU exception, the exception state must be
// cleared before executing the VALU instructions below.
v_clrexcp
#endif
// Trap temporaries must be saved via VGPR but all VGPRs are in use.
// There is no ttmp space to hold the resource constant for VGPR save.
// Save v0 by itself since it requires only two SGPRs.
......
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