Commit f69162ae authored by Hartley Sweeten's avatar Hartley Sweeten Committed by Russell King

[ARM] 5242/1: ep93xx: bugfix, GPIO port F enable register offset

The GPIO port F enable register offset points to the wrong register,
0x5c is the IntStsF register. The correct offset is 0x58. This patch
corrects it.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent b8e6c91c
...@@ -157,7 +157,7 @@ static unsigned char gpio_int_type2[3]; ...@@ -157,7 +157,7 @@ static unsigned char gpio_int_type2[3];
static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c };
static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 };
static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 };
static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c }; static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 };
void ep93xx_gpio_update_int_params(unsigned port) void ep93xx_gpio_update_int_params(unsigned port)
{ {
......
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