net: ipa: kill ev_ch_e_cntxt_1_length_encode()

Now that we explicitly define each register field width there is no
need to have a special encoding function for the event ring length.
Add a field for this to the EV_CH_E_CNTXT_1 GSI register, and use it
in place of ev_ch_e_cntxt_1_length_encode() (which can be removed).
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

drivers/net/ipa/gsi.c

@@ -193,17 +193,6 @@ static u32 ch_c_cntxt_0_type_encode(enum ipa_version version,
 	return val | reg_encode(reg, CHTYPE_PROTOCOL_MSB, type);
 }
 
-/* Encode the length of the event channel ring buffer for the
- * EV_CH_E_CNTXT_1 register.
- */
-static u32 ev_ch_e_cntxt_1_length_encode(enum ipa_version version, u32 length)
-{
-	if (version < IPA_VERSION_4_9)
-		return u32_encode_bits(length, GENMASK(15, 0));
-
-	return u32_encode_bits(length, GENMASK(19, 0));
-}
-
 /* Update the GSI IRQ type register with the cached value */
 static void gsi_irq_type_update(struct gsi *gsi, u32 val)
 {
@@ -731,7 +720,6 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id)
 	struct gsi_evt_ring *evt_ring = &gsi->evt_ring[evt_ring_id];
 	struct gsi_ring *ring = &evt_ring->ring;
 	const struct reg *reg;
-	size_t size;
 	u32 val;
 
 	reg = gsi_reg(gsi, EV_CH_E_CNTXT_0);
@@ -743,8 +731,7 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id)
 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));
 
 	reg = gsi_reg(gsi, EV_CH_E_CNTXT_1);
-	size = ring->count * GSI_RING_ELEMENT_SIZE;
-	val = ev_ch_e_cntxt_1_length_encode(gsi->version, size);
+	val = reg_encode(reg, R_LENGTH, ring->count * GSI_RING_ELEMENT_SIZE);
 	iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id));
 
 	/* The context 2 and 3 registers store the low-order and

drivers/net/ipa/gsi_reg.h

@@ -135,6 +135,7 @@ enum gsi_reg_ch_c_qos_field_id {
 	PREFETCH_MODE,					/* IPA v4.5+ */
 	EMPTY_LVL_THRSHOLD,				/* IPA v4.5+ */
 	DB_IN_BYTES,					/* IPA v4.9+ */
+	LOW_LATENCY_EN,					/* IPA v5.0+ */
 };
 
 /** enum gsi_prefetch_mode - PREFETCH_MODE field in CH_C_QOS */
@@ -155,6 +156,11 @@ enum gsi_reg_ch_c_ev_ch_e_cntxt_0_field_id {
 	EV_ELEMENT_SIZE,
 };
 
+/* EV_CH_E_CNTXT_1 register */
+enum gsi_reg_ev_ch_c_cntxt_1_field_id {
+	R_LENGTH,
+};
+
 /* EV_CH_E_CNTXT_8 register */
 enum gsi_reg_ch_c_ev_ch_e_cntxt_8_field_id {
 	EV_MODT,

drivers/net/ipa/reg/gsi_reg-v3.1.c

@@ -87,8 +87,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
 REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
 		  0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
-	   0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {
+	[R_LENGTH]					= GENMASK(15, 0),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
+		  0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,
 	   0x0001d008 + 0x4000 * GSI_EE_AP, 0x80);

drivers/net/ipa/reg/gsi_reg-v3.5.1.c

@@ -87,8 +87,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
 REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
 		  0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
-	   0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {
+	[R_LENGTH]					= GENMASK(15, 0),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
+		  0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,
 	   0x0001d008 + 0x4000 * GSI_EE_AP, 0x80);

drivers/net/ipa/reg/gsi_reg-v4.0.c

@@ -88,8 +88,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
 REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
 		  0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
-	   0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {
+	[R_LENGTH]					= GENMASK(15, 0),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
+		  0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,
 	   0x0001d008 + 0x4000 * GSI_EE_AP, 0x80);

drivers/net/ipa/reg/gsi_reg-v4.11.c

@@ -91,8 +91,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
 REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
 		  0x00010000 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
-	   0x00010004 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {
+	[R_LENGTH]					= GENMASK(19, 0),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
+		  0x00010004 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,
 	   0x00010008 + 0x4000 * GSI_EE_AP, 0x80);

drivers/net/ipa/reg/gsi_reg-v4.5.c

@@ -90,8 +90,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
 REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
 		  0x00010000 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
-	   0x00010004 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {
+	[R_LENGTH]					= GENMASK(15, 0),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
+		  0x00010004 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,
 	   0x00010008 + 0x4000 * GSI_EE_AP, 0x80);

drivers/net/ipa/reg/gsi_reg-v4.9.c

@@ -91,8 +91,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = {
 REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0,
 		  0x0001d000 + 0x4000 * GSI_EE_AP, 0x80);
 
-REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
-	   0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
+static const u32 reg_ev_ch_e_cntxt_1_fmask[] = {
+	[R_LENGTH]					= GENMASK(15, 0),
+};
+
+REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1,
+		  0x0001d004 + 0x4000 * GSI_EE_AP, 0x80);
 
 REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2,
 	   0x0001d008 + 0x4000 * GSI_EE_AP, 0x80);