Commit f89f55df authored by Jerome Brunet's avatar Jerome Brunet Committed by Ulf Hansson

mmc: meson-gx: rework clk_set function

Clean-up clk_set function to prepare the next changes (DDR and clk-stop)
Reviewed-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent c36cf125
...@@ -139,7 +139,7 @@ struct meson_host { ...@@ -139,7 +139,7 @@ struct meson_host {
struct clk *core_clk; struct clk *core_clk;
struct clk_mux mux; struct clk_mux mux;
struct clk *mux_clk; struct clk *mux_clk;
unsigned long current_clock; unsigned long req_rate;
struct clk_divider cfg_div; struct clk_divider cfg_div;
struct clk *cfg_div_clk; struct clk *cfg_div_clk;
...@@ -275,29 +275,18 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate) ...@@ -275,29 +275,18 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate)
int ret; int ret;
u32 cfg; u32 cfg;
if (clk_rate) { /* Same request - bail-out */
if (WARN_ON(clk_rate > mmc->f_max)) if (host->req_rate == clk_rate)
clk_rate = mmc->f_max;
else if (WARN_ON(clk_rate < mmc->f_min))
clk_rate = mmc->f_min;
}
if (clk_rate == host->current_clock)
return 0; return 0;
/* stop clock */ /* stop clock */
cfg = readl(host->regs + SD_EMMC_CFG); cfg = readl(host->regs + SD_EMMC_CFG);
if (!(cfg & CFG_STOP_CLOCK)) { cfg |= CFG_STOP_CLOCK;
cfg |= CFG_STOP_CLOCK; writel(cfg, host->regs + SD_EMMC_CFG);
writel(cfg, host->regs + SD_EMMC_CFG); host->req_rate = 0;
}
dev_dbg(host->dev, "change clock rate %u -> %lu\n",
mmc->actual_clock, clk_rate);
if (!clk_rate) { if (!clk_rate) {
mmc->actual_clock = 0; mmc->actual_clock = 0;
host->current_clock = 0;
/* return with clock being stopped */ /* return with clock being stopped */
return 0; return 0;
} }
...@@ -309,13 +298,12 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate) ...@@ -309,13 +298,12 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate)
return ret; return ret;
} }
host->req_rate = clk_rate;
mmc->actual_clock = clk_get_rate(host->cfg_div_clk); mmc->actual_clock = clk_get_rate(host->cfg_div_clk);
host->current_clock = clk_rate;
dev_dbg(host->dev, "clk rate: %u Hz\n", mmc->actual_clock);
if (clk_rate != mmc->actual_clock) if (clk_rate != mmc->actual_clock)
dev_dbg(host->dev, dev_dbg(host->dev, "requested rate was %lu\n", clk_rate);
"divider requested rate %lu != actual rate %u\n",
clk_rate, mmc->actual_clock);
/* (re)start clock */ /* (re)start clock */
cfg = readl(host->regs + SD_EMMC_CFG); cfg = readl(host->regs + SD_EMMC_CFG);
......
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