Commit fb6c4513 authored by Bjorn Helgaas's avatar Bjorn Helgaas

Merge branch 'pci/enumeration'

- Use pci_find_vsec_capability() instead of open-coding it (Andy
  Shevchenko)

- Convert pci_dev_present() stub from macro to static inline to avoid
  'unused variable' errors (Hans de Goede)

- Convert sysfs slot attributes from default_attrs to default_groups (Greg
  Kroah-Hartman)

- Use DWORD accesses for LTR, L1 SS to avoid BayHub OZ711LV2 erratum (Rajat
  Jain)

- Remove unnecessary initialization of static variables (Longji Guo)

* pci/enumeration:
  x86/PCI: Remove initialization of static variables to false
  PCI: Use DWORD accesses for LTR, L1 SS to avoid erratum
  PCI/sysfs: Use default_groups in kobj_type for slot attrs
  PCI: Convert pci_dev_present() stub to static inline
  PCI: Use pci_find_vsec_capability() when looking for TBT devices
parents 7498e41f 346865f0
...@@ -20,7 +20,7 @@ struct pci_root_info { ...@@ -20,7 +20,7 @@ struct pci_root_info {
}; };
static bool pci_use_crs = true; static bool pci_use_crs = true;
static bool pci_ignore_seg = false; static bool pci_ignore_seg;
static int __init set_use_crs(const struct dmi_system_id *id) static int __init set_use_crs(const struct dmi_system_id *id)
{ {
......
...@@ -1556,7 +1556,7 @@ static void pci_save_ltr_state(struct pci_dev *dev) ...@@ -1556,7 +1556,7 @@ static void pci_save_ltr_state(struct pci_dev *dev)
{ {
int ltr; int ltr;
struct pci_cap_saved_state *save_state; struct pci_cap_saved_state *save_state;
u16 *cap; u32 *cap;
if (!pci_is_pcie(dev)) if (!pci_is_pcie(dev))
return; return;
...@@ -1571,25 +1571,25 @@ static void pci_save_ltr_state(struct pci_dev *dev) ...@@ -1571,25 +1571,25 @@ static void pci_save_ltr_state(struct pci_dev *dev)
return; return;
} }
cap = (u16 *)&save_state->cap.data[0]; /* Some broken devices only support dword access to LTR */
pci_read_config_word(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap++); cap = &save_state->cap.data[0];
pci_read_config_word(dev, ltr + PCI_LTR_MAX_NOSNOOP_LAT, cap++); pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap);
} }
static void pci_restore_ltr_state(struct pci_dev *dev) static void pci_restore_ltr_state(struct pci_dev *dev)
{ {
struct pci_cap_saved_state *save_state; struct pci_cap_saved_state *save_state;
int ltr; int ltr;
u16 *cap; u32 *cap;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR);
ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);
if (!save_state || !ltr) if (!save_state || !ltr)
return; return;
cap = (u16 *)&save_state->cap.data[0]; /* Some broken devices only support dword access to LTR */
pci_write_config_word(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap++); cap = &save_state->cap.data[0];
pci_write_config_word(dev, ltr + PCI_LTR_MAX_NOSNOOP_LAT, *cap++); pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap);
} }
/** /**
......
...@@ -503,6 +503,7 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link, ...@@ -503,6 +503,7 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link,
encode_l12_threshold(l1_2_threshold, &scale, &value); encode_l12_threshold(l1_2_threshold, &scale, &value);
ctl1 |= t_common_mode << 8 | scale << 29 | value << 16; ctl1 |= t_common_mode << 8 | scale << 29 | value << 16;
/* Some broken devices only support dword access to L1 SS */
pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, &pctl1); pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, &pctl1);
pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, &pctl2); pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL2, &pctl2);
pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, &cctl1); pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, &cctl1);
......
...@@ -1579,20 +1579,12 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev) ...@@ -1579,20 +1579,12 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev)
static void set_pcie_thunderbolt(struct pci_dev *dev) static void set_pcie_thunderbolt(struct pci_dev *dev)
{ {
int vsec = 0; u16 vsec;
u32 header;
while ((vsec = pci_find_next_ext_capability(dev, vsec, /* Is the device part of a Thunderbolt controller? */
PCI_EXT_CAP_ID_VNDR))) { vsec = pci_find_vsec_capability(dev, PCI_VENDOR_ID_INTEL, PCI_VSEC_ID_INTEL_TBT);
pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER, &header); if (vsec)
dev->is_thunderbolt = 1;
/* Is the device part of a Thunderbolt controller? */
if (dev->vendor == PCI_VENDOR_ID_INTEL &&
PCI_VNDR_HEADER_ID(header) == PCI_VSEC_ID_INTEL_TBT) {
dev->is_thunderbolt = 1;
return;
}
}
} }
static void set_pcie_untrusted(struct pci_dev *dev) static void set_pcie_untrusted(struct pci_dev *dev)
......
...@@ -96,11 +96,12 @@ static struct attribute *pci_slot_default_attrs[] = { ...@@ -96,11 +96,12 @@ static struct attribute *pci_slot_default_attrs[] = {
&pci_slot_attr_cur_speed.attr, &pci_slot_attr_cur_speed.attr,
NULL, NULL,
}; };
ATTRIBUTE_GROUPS(pci_slot_default);
static struct kobj_type pci_slot_ktype = { static struct kobj_type pci_slot_ktype = {
.sysfs_ops = &pci_slot_sysfs_ops, .sysfs_ops = &pci_slot_sysfs_ops,
.release = &pci_slot_release, .release = &pci_slot_release,
.default_attrs = pci_slot_default_attrs, .default_groups = pci_slot_default_groups,
}; };
static char *make_slot_name(const char *name) static char *make_slot_name(const char *name)
......
...@@ -1775,7 +1775,10 @@ static inline struct pci_dev *pci_get_class(unsigned int class, ...@@ -1775,7 +1775,10 @@ static inline struct pci_dev *pci_get_class(unsigned int class,
struct pci_dev *from) struct pci_dev *from)
{ return NULL; } { return NULL; }
#define pci_dev_present(ids) (0)
static inline int pci_dev_present(const struct pci_device_id *ids)
{ return 0; }
#define no_pci_devices() (1) #define no_pci_devices() (1)
#define pci_dev_put(dev) do { } while (0) #define pci_dev_put(dev) do { } while (0)
......
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