Commit fd141e17 authored by Linus Walleij's avatar Linus Walleij

Merge tag 'renesas-pinctrl-for-v6.9-tag1' of...

Merge tag 'renesas-pinctrl-for-v6.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v6.9

  - Add pin groups for SCIF_CLK2 on R-Car V4H,
  - Add support for port pins P19 to P28 on RZ/Five,
  - Miscellaneous fixes and improvements.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parents 2c0aafdf fea58424
...@@ -46,6 +46,10 @@ cpu0_intc: interrupt-controller { ...@@ -46,6 +46,10 @@ cpu0_intc: interrupt-controller {
}; };
}; };
&pinctrl {
gpio-ranges = <&pinctrl 0 0 232>;
};
&soc { &soc {
dma-noncoherent; dma-noncoherent;
interrupt-parent = <&plic>; interrupt-parent = <&plic>;
......
...@@ -907,9 +907,11 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname, ...@@ -907,9 +907,11 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname,
sh_pfc_err("reg 0x%x: var_field_width declares %u instead of %u bits\n", sh_pfc_err("reg 0x%x: var_field_width declares %u instead of %u bits\n",
cfg_reg->reg, rw, cfg_reg->reg_width); cfg_reg->reg, rw, cfg_reg->reg_width);
if (n != cfg_reg->nr_enum_ids) if (n != cfg_reg->nr_enum_ids) {
sh_pfc_err("reg 0x%x: enum_ids[] has %u instead of %u values\n", sh_pfc_err("reg 0x%x: enum_ids[] has %u instead of %u values\n",
cfg_reg->reg, cfg_reg->nr_enum_ids, n); cfg_reg->reg, cfg_reg->nr_enum_ids, n);
n = cfg_reg->nr_enum_ids;
}
check_enum_ids: check_enum_ids:
sh_pfc_check_reg_enums(drvname, cfg_reg->reg, cfg_reg->enum_ids, n); sh_pfc_check_reg_enums(drvname, cfg_reg->reg, cfg_reg->enum_ids, n);
......
...@@ -2384,6 +2384,14 @@ static const unsigned int scif_clk_mux[] = { ...@@ -2384,6 +2384,14 @@ static const unsigned int scif_clk_mux[] = {
SCIF_CLK_MARK, SCIF_CLK_MARK,
}; };
static const unsigned int scif_clk2_pins[] = {
/* SCIF_CLK2 */
RCAR_GP_PIN(8, 11),
};
static const unsigned int scif_clk2_mux[] = {
SCIF_CLK2_MARK,
};
/* - SSI ------------------------------------------------- */ /* - SSI ------------------------------------------------- */
static const unsigned int ssi_data_pins[] = { static const unsigned int ssi_data_pins[] = {
/* SSI_SD */ /* SSI_SD */
...@@ -2694,6 +2702,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { ...@@ -2694,6 +2702,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scif4_clk), SH_PFC_PIN_GROUP(scif4_clk),
SH_PFC_PIN_GROUP(scif4_ctrl), SH_PFC_PIN_GROUP(scif4_ctrl),
SH_PFC_PIN_GROUP(scif_clk), SH_PFC_PIN_GROUP(scif_clk),
SH_PFC_PIN_GROUP(scif_clk2),
SH_PFC_PIN_GROUP(ssi_data), SH_PFC_PIN_GROUP(ssi_data),
SH_PFC_PIN_GROUP(ssi_ctrl), SH_PFC_PIN_GROUP(ssi_ctrl),
...@@ -3015,6 +3024,10 @@ static const char * const scif_clk_groups[] = { ...@@ -3015,6 +3024,10 @@ static const char * const scif_clk_groups[] = {
"scif_clk", "scif_clk",
}; };
static const char * const scif_clk2_groups[] = {
"scif_clk2",
};
static const char * const ssi_groups[] = { static const char * const ssi_groups[] = {
"ssi_data", "ssi_data",
"ssi_ctrl", "ssi_ctrl",
...@@ -3102,6 +3115,7 @@ static const struct sh_pfc_function pinmux_functions[] = { ...@@ -3102,6 +3115,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(scif3), SH_PFC_FUNCTION(scif3),
SH_PFC_FUNCTION(scif4), SH_PFC_FUNCTION(scif4),
SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(scif_clk2),
SH_PFC_FUNCTION(ssi), SH_PFC_FUNCTION(ssi),
......
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