[ARM PATCH] 2527/1: S3C2410 - update regs-iis.h with fifo and s3c2440

Patch from Ben Dooks

Add definitions for getting FIFO usage information
and the small difference for using the s3c2440.

Signed-off-by: Ben Dooks
Signed-off-by: Russell King

include/asm-arm/arch-s3c2410/regs-iis.h

@@ -13,6 +13,7 @@
  *    19-06-2003     BJD     Created file
  *    26-06-2003     BJD     Finished off definitions for register addresses
  *    12-03-2004     BJD     Updated include protection
+ *    07-03-2005     BJD     Added FIFO size flags and S3C2440 MPLL
  */
 
 #ifndef __ASM_ARCH_REGS_IIS_H
@@ -20,6 +21,7 @@
 
 #define S3C2410_IISCON	 (0x00)
 
+#define S3C2440_IISCON_MPLL	  (1<<9)
 #define S3C2410_IISCON_LRINDEX	  (1<<8)
 #define S3C2410_IISCON_TXFIFORDY  (1<<7)
 #define S3C2410_IISCON_RXFIFORDY  (1<<6)
@@ -42,6 +44,7 @@
 #define S3C2410_IISMOD_MSB	  (1<<4)
 #define S3C2410_IISMOD_8BIT	  (0<<3)
 #define S3C2410_IISMOD_16BIT	  (1<<3)
+#define S3C2410_IISMOD_BITMASK	  (1<<3)
 #define S3C2410_IISMOD_256FS	  (0<<1)
 #define S3C2410_IISMOD_384FS	  (1<<1)
 #define S3C2410_IISMOD_16FS	  (0<<0)
@@ -50,7 +53,7 @@
 
 #define S3C2410_IISPSR		(0x08)
 #define S3C2410_IISPSR_INTMASK	(31<<5)
-#define S3C2410_IISPSR_INTSHFIT	(5)
+#define S3C2410_IISPSR_INTSHIFT	(5)
 #define S3C2410_IISPSR_EXTMASK	(31<<0)
 #define S3C2410_IISPSR_EXTSHFIT	(0)
 
@@ -60,8 +63,10 @@
 #define S3C2410_IISFCON_RXDMA	  (1<<14)
 #define S3C2410_IISFCON_TXENABLE  (1<<13)
 #define S3C2410_IISFCON_RXENABLE  (1<<12)
+#define S3C2410_IISFCON_TXMASK	  (0x3f << 6)
+#define S3C2410_IISFCON_TXSHIFT	  (6)
+#define S3C2410_IISFCON_RXMASK	  (0x3f)
+#define S3C2410_IISFCON_RXSHIFT	  (0)
 
 #define S3C2410_IISFIFO  (0x10)
-
 #endif /* __ASM_ARCH_REGS_IIS_H */
-