ASoC: cs42l42: Set correct SRC MCLK
According to the datasheet the SRC MCLK must be as near as possible to (125 * sample rate). This means it should be ~6MHz for rates up to 48k and ~12MHz for rates above that. As per datasheet table 4-21. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20211015133619.4698-14-rf@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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