Commit fe6a6de6 authored by Srinivas Pandruvada's avatar Srinivas Pandruvada Committed by Daniel Lezcano

thermal/drivers/int340x/processor_thermal: Fix tcc setting

The following fixes are done for tcc sysfs interface:
- TCC is 6 bits only from bit 29-24
- TCC of 0 is valid
- When BIT(31) is set, this register is read only
- Check for invalid tcc value
- Error for negative values

Fixes: fdf4f2fb ("drivers: thermal: processor_thermal_device: Export sysfs interface for TCC offset")
Signed-off-by: default avatarSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: stable@vger.kernel.org
Acked-by: default avatarZhang Rui <rui.zhang@intel.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210628215803.75038-1-srinivas.pandruvada@linux.intel.com
parent ad079d98
...@@ -78,24 +78,27 @@ static ssize_t tcc_offset_degree_celsius_show(struct device *dev, ...@@ -78,24 +78,27 @@ static ssize_t tcc_offset_degree_celsius_show(struct device *dev,
if (err) if (err)
return err; return err;
val = (val >> 24) & 0xff; val = (val >> 24) & 0x3f;
return sprintf(buf, "%d\n", (int)val); return sprintf(buf, "%d\n", (int)val);
} }
static int tcc_offset_update(int tcc) static int tcc_offset_update(unsigned int tcc)
{ {
u64 val; u64 val;
int err; int err;
if (!tcc) if (tcc > 63)
return -EINVAL; return -EINVAL;
err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val); err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
if (err) if (err)
return err; return err;
val &= ~GENMASK_ULL(31, 24); if (val & BIT(31))
val |= (tcc & 0xff) << 24; return -EPERM;
val &= ~GENMASK_ULL(29, 24);
val |= (tcc & 0x3f) << 24;
err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val); err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val);
if (err) if (err)
...@@ -104,14 +107,15 @@ static int tcc_offset_update(int tcc) ...@@ -104,14 +107,15 @@ static int tcc_offset_update(int tcc)
return 0; return 0;
} }
static int tcc_offset_save; static unsigned int tcc_offset_save;
static ssize_t tcc_offset_degree_celsius_store(struct device *dev, static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
struct device_attribute *attr, const char *buf, struct device_attribute *attr, const char *buf,
size_t count) size_t count)
{ {
unsigned int tcc;
u64 val; u64 val;
int tcc, err; int err;
err = rdmsrl_safe(MSR_PLATFORM_INFO, &val); err = rdmsrl_safe(MSR_PLATFORM_INFO, &val);
if (err) if (err)
...@@ -120,7 +124,7 @@ static ssize_t tcc_offset_degree_celsius_store(struct device *dev, ...@@ -120,7 +124,7 @@ static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
if (!(val & BIT(30))) if (!(val & BIT(30)))
return -EACCES; return -EACCES;
if (kstrtoint(buf, 0, &tcc)) if (kstrtouint(buf, 0, &tcc))
return -EINVAL; return -EINVAL;
err = tcc_offset_update(tcc); err = tcc_offset_update(tcc);
......
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