Skip to content

L
linux
Commit fe8ebee1 authored by Dave Airlie's avatar Dave Airlie
Browse files
Options

drm: cleanup patch 

This makes a lot of functions static and cleans up a few
other minor things.

From: Adrian Bunk <bunk@stusta.de>
Signed-off-by: default avatarDave Airlie <airlied@linux.ie>
parent 5bc5f96b
Hide whitespace changes
Inline Side-by-side
Showing with 131 additions and 354 deletions
drivers/char/drm/mga_dma.c
View file @ fe8ebee1
...@@ -41,6 +41,7 @@ ...@@ -41,6 +41,7 @@
#define MGA_DEFAULT_USEC_TIMEOUT 10000 #define MGA_DEFAULT_USEC_TIMEOUT 10000
#define MGA_FREELIST_DEBUG 0 #define MGA_FREELIST_DEBUG 0
static int mga_do_cleanup_dma( drm_device_t *dev );
/* ================================================================ /* ================================================================
* Engine control * Engine control
...@@ -68,25 +69,7 @@ int mga_do_wait_for_idle( drm_mga_private_t *dev_priv ) ...@@ -68,25 +69,7 @@ int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
return DRM_ERR(EBUSY); return DRM_ERR(EBUSY);
} }
int mga_do_dma_idle( drm_mga_private_t *dev_priv ) static int mga_do_dma_reset( drm_mga_private_t *dev_priv )
{
u32 status = 0;
int i;
DRM_DEBUG( "\n" );
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
if ( status == MGA_ENDPRDMASTS ) return 0;
DRM_UDELAY( 1 );
}
#if MGA_DMA_DEBUG
DRM_ERROR( "failed! status=0x%08x\n", status );
#endif
return DRM_ERR(EBUSY);
}
int mga_do_dma_reset( drm_mga_private_t *dev_priv )
{ {
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_primary_buffer_t *primary = &dev_priv->prim; drm_mga_primary_buffer_t *primary = &dev_priv->prim;
...@@ -110,44 +93,6 @@ int mga_do_dma_reset( drm_mga_private_t *dev_priv ) ...@@ -110,44 +93,6 @@ int mga_do_dma_reset( drm_mga_private_t *dev_priv )
return 0; return 0;
} }
int mga_do_engine_reset( drm_mga_private_t *dev_priv )
{
DRM_DEBUG( "\n" );
/* Okay, so we've completely screwed up and locked the engine.
* How about we clean up after ourselves?
*/
MGA_WRITE( MGA_RST, MGA_SOFTRESET );
DRM_UDELAY( 15 ); /* Wait at least 10 usecs */
MGA_WRITE( MGA_RST, 0 );
/* Initialize the registers that get clobbered by the soft
* reset. Many of the core register values survive a reset,
* but the drawing registers are basically all gone.
*
* 3D clients should probably die after calling this. The X
* server should reset the engine state to known values.
*/
#if 0
MGA_WRITE( MGA_PRIMPTR,
virt_to_bus((void *)dev_priv->prim.status_page) |
MGA_PRIMPTREN0 |
MGA_PRIMPTREN1 );
#endif
MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
MGA_WRITE( MGA_IEN, MGA_SOFTRAPIEN );
/* The primary DMA stream should look like new right about now.
*/
mga_do_dma_reset( dev_priv );
/* This bad boy will never fail.
*/
return 0;
}
/* ================================================================ /* ================================================================
* Primary DMA stream * Primary DMA stream
*/ */
...@@ -625,7 +570,7 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init ) ...@@ -625,7 +570,7 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
return 0; return 0;
} }
int mga_do_cleanup_dma( drm_device_t *dev ) static int mga_do_cleanup_dma( drm_device_t *dev )
{ {
DRM_DEBUG( "\n" ); DRM_DEBUG( "\n" );
......
drivers/char/drm/mga_drv.h
View file @ fe8ebee1
...@@ -121,10 +121,6 @@ extern void mga_driver_pretakedown(drm_device_t *dev); ...@@ -121,10 +121,6 @@ extern void mga_driver_pretakedown(drm_device_t *dev);
extern int mga_driver_dma_quiescent(drm_device_t *dev); extern int mga_driver_dma_quiescent(drm_device_t *dev);
extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv ); extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv );
extern int mga_do_dma_idle( drm_mga_private_t *dev_priv );
extern int mga_do_dma_reset( drm_mga_private_t *dev_priv );
extern int mga_do_engine_reset( drm_mga_private_t *dev_priv );
extern int mga_do_cleanup_dma( drm_device_t *dev );
extern void mga_do_dma_flush( drm_mga_private_t *dev_priv ); extern void mga_do_dma_flush( drm_mga_private_t *dev_priv );
extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv ); extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv );
...@@ -132,15 +128,6 @@ extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv ); ...@@ -132,15 +128,6 @@ extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv );
extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf ); extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf );
/* mga_state.c */
extern int mga_dma_clear( DRM_IOCTL_ARGS );
extern int mga_dma_swap( DRM_IOCTL_ARGS );
extern int mga_dma_vertex( DRM_IOCTL_ARGS );
extern int mga_dma_indices( DRM_IOCTL_ARGS );
extern int mga_dma_iload( DRM_IOCTL_ARGS );
extern int mga_dma_blit( DRM_IOCTL_ARGS );
extern int mga_getparam( DRM_IOCTL_ARGS );
/* mga_warp.c */ /* mga_warp.c */
extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv ); extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
extern int mga_warp_init( drm_mga_private_t *dev_priv ); extern int mga_warp_init( drm_mga_private_t *dev_priv );
......
drivers/char/drm/mga_state.c
View file @ fe8ebee1
...@@ -37,21 +37,6 @@ ...@@ -37,21 +37,6 @@
#include "mga_drm.h" #include "mga_drm.h"
#include "mga_drv.h" #include "mga_drv.h"
drm_ioctl_desc_t mga_ioctls[] = {
[DRM_IOCTL_NR(DRM_MGA_INIT)] = { mga_dma_init, 1, 1 },
[DRM_IOCTL_NR(DRM_MGA_FLUSH)] = { mga_dma_flush, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_RESET)] = { mga_dma_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_SWAP)] = { mga_dma_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_CLEAR)] = { mga_dma_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_INDICES)] = { mga_dma_indices, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_ILOAD)] = { mga_dma_iload, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_BLIT)] = { mga_dma_blit, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_GETPARAM)]= { mga_getparam, 1, 0 },
};
int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);
/* ================================================================ /* ================================================================
* DMA hardware state programming functions * DMA hardware state programming functions
*/ */
...@@ -893,7 +878,7 @@ static void mga_dma_dispatch_blit( drm_device_t *dev, ...@@ -893,7 +878,7 @@ static void mga_dma_dispatch_blit( drm_device_t *dev,
* *
*/ */
int mga_dma_clear( DRM_IOCTL_ARGS ) static int mga_dma_clear( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_private_t *dev_priv = dev->dev_private;
...@@ -918,7 +903,7 @@ int mga_dma_clear( DRM_IOCTL_ARGS ) ...@@ -918,7 +903,7 @@ int mga_dma_clear( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int mga_dma_swap( DRM_IOCTL_ARGS ) static int mga_dma_swap( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_private_t *dev_priv = dev->dev_private;
...@@ -940,7 +925,7 @@ int mga_dma_swap( DRM_IOCTL_ARGS ) ...@@ -940,7 +925,7 @@ int mga_dma_swap( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int mga_dma_vertex( DRM_IOCTL_ARGS ) static int mga_dma_vertex( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_private_t *dev_priv = dev->dev_private;
...@@ -979,7 +964,7 @@ int mga_dma_vertex( DRM_IOCTL_ARGS ) ...@@ -979,7 +964,7 @@ int mga_dma_vertex( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int mga_dma_indices( DRM_IOCTL_ARGS ) static int mga_dma_indices( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_private_t *dev_priv = dev->dev_private;
...@@ -1018,7 +1003,7 @@ int mga_dma_indices( DRM_IOCTL_ARGS ) ...@@ -1018,7 +1003,7 @@ int mga_dma_indices( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int mga_dma_iload( DRM_IOCTL_ARGS ) static int mga_dma_iload( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_device_dma_t *dma = dev->dma; drm_device_dma_t *dma = dev->dma;
...@@ -1060,7 +1045,7 @@ int mga_dma_iload( DRM_IOCTL_ARGS ) ...@@ -1060,7 +1045,7 @@ int mga_dma_iload( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int mga_dma_blit( DRM_IOCTL_ARGS ) static int mga_dma_blit( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_private_t *dev_priv = dev->dev_private;
...@@ -1089,7 +1074,7 @@ int mga_dma_blit( DRM_IOCTL_ARGS ) ...@@ -1089,7 +1074,7 @@ int mga_dma_blit( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int mga_getparam( DRM_IOCTL_ARGS ) static int mga_getparam( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private; drm_mga_private_t *dev_priv = dev->dev_private;
...@@ -1121,3 +1106,18 @@ int mga_getparam( DRM_IOCTL_ARGS ) ...@@ -1121,3 +1106,18 @@ int mga_getparam( DRM_IOCTL_ARGS )
return 0; return 0;
} }
drm_ioctl_desc_t mga_ioctls[] = {
[DRM_IOCTL_NR(DRM_MGA_INIT)] = { mga_dma_init, 1, 1 },
[DRM_IOCTL_NR(DRM_MGA_FLUSH)] = { mga_dma_flush, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_RESET)] = { mga_dma_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_SWAP)] = { mga_dma_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_CLEAR)] = { mga_dma_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_INDICES)] = { mga_dma_indices, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_ILOAD)] = { mga_dma_iload, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_BLIT)] = { mga_dma_blit, 1, 0 },
[DRM_IOCTL_NR(DRM_MGA_GETPARAM)]= { mga_getparam, 1, 0 },
};
int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);
drivers/char/drm/r128_cce.c
View file @ fe8ebee1
...@@ -80,7 +80,7 @@ static u32 r128_cce_microcode[] = { ...@@ -80,7 +80,7 @@ static u32 r128_cce_microcode[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
}; };
int R128_READ_PLL(drm_device_t *dev, int addr) static int R128_READ_PLL(drm_device_t *dev, int addr)
{ {
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -808,7 +808,7 @@ static int r128_freelist_init( drm_device_t *dev ) ...@@ -808,7 +808,7 @@ static int r128_freelist_init( drm_device_t *dev )
} }
#endif #endif
drm_buf_t *r128_freelist_get( drm_device_t *dev ) static drm_buf_t *r128_freelist_get( drm_device_t *dev )
{ {
drm_device_dma_t *dma = dev->dma; drm_device_dma_t *dma = dev->dma;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
......
drivers/char/drm/r128_drv.h
View file @ fe8ebee1
...@@ -139,27 +139,13 @@ extern int r128_cce_idle( DRM_IOCTL_ARGS ); ...@@ -139,27 +139,13 @@ extern int r128_cce_idle( DRM_IOCTL_ARGS );
extern int r128_engine_reset( DRM_IOCTL_ARGS ); extern int r128_engine_reset( DRM_IOCTL_ARGS );
extern int r128_fullscreen( DRM_IOCTL_ARGS ); extern int r128_fullscreen( DRM_IOCTL_ARGS );
extern int r128_cce_buffers( DRM_IOCTL_ARGS ); extern int r128_cce_buffers( DRM_IOCTL_ARGS );
extern int r128_getparam( DRM_IOCTL_ARGS );
extern void r128_freelist_reset( drm_device_t *dev ); extern void r128_freelist_reset( drm_device_t *dev );
extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n ); extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
extern int r128_do_cce_idle( drm_r128_private_t *dev_priv ); extern int r128_do_cce_idle( drm_r128_private_t *dev_priv );
extern int r128_do_cleanup_cce( drm_device_t *dev ); extern int r128_do_cleanup_cce( drm_device_t *dev );
extern int r128_do_cleanup_pageflip( drm_device_t *dev );
/* r128_state.c */
extern int r128_cce_clear( DRM_IOCTL_ARGS );
extern int r128_cce_swap( DRM_IOCTL_ARGS );
extern int r128_cce_flip( DRM_IOCTL_ARGS );
extern int r128_cce_vertex( DRM_IOCTL_ARGS );
extern int r128_cce_indices( DRM_IOCTL_ARGS );
extern int r128_cce_blit( DRM_IOCTL_ARGS );
extern int r128_cce_depth( DRM_IOCTL_ARGS );
extern int r128_cce_stipple( DRM_IOCTL_ARGS );
extern int r128_cce_indirect( DRM_IOCTL_ARGS );
extern int r128_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); extern int r128_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence);
...@@ -406,8 +392,6 @@ do { \ ...@@ -406,8 +392,6 @@ do { \
R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
} while (0) } while (0)
extern int R128_READ_PLL(drm_device_t *dev, int addr);
#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ #define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
((n) << 16) | ((reg) >> 2)) ((n) << 16) | ((reg) >> 2))
......
drivers/char/drm/r128_state.c
View file @ fe8ebee1
...@@ -32,27 +32,6 @@ ...@@ -32,27 +32,6 @@
#include "r128_drm.h" #include "r128_drm.h"
#include "r128_drv.h" #include "r128_drv.h"
drm_ioctl_desc_t r128_ioctls[] = {
[DRM_IOCTL_NR(DRM_R128_INIT)] = { r128_cce_init, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_START)] = { r128_cce_start, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_RESET)] = { r128_engine_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_SWAP)] = { r128_cce_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_FLIP)] = { r128_cce_flip, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_CLEAR)] = { r128_cce_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_VERTEX)] = { r128_cce_vertex, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_INDICES)] = { r128_cce_indices, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_BLIT)] = { r128_cce_blit, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_DEPTH)] = { r128_cce_depth, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_GETPARAM)] = { r128_getparam, 1, 0 },
};
int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
/* ================================================================ /* ================================================================
* CCE hardware state programming functions * CCE hardware state programming functions
...@@ -1281,7 +1260,7 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple ) ...@@ -1281,7 +1260,7 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
* IOCTL functions * IOCTL functions
*/ */
int r128_cce_clear( DRM_IOCTL_ARGS ) static int r128_cce_clear( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1349,7 +1328,7 @@ int r128_do_cleanup_pageflip( drm_device_t *dev ) ...@@ -1349,7 +1328,7 @@ int r128_do_cleanup_pageflip( drm_device_t *dev )
* They can & should be intermixed to support multiple 3d windows. * They can & should be intermixed to support multiple 3d windows.
*/ */
int r128_cce_flip( DRM_IOCTL_ARGS ) static int r128_cce_flip( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1368,7 +1347,7 @@ int r128_cce_flip( DRM_IOCTL_ARGS ) ...@@ -1368,7 +1347,7 @@ int r128_cce_flip( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int r128_cce_swap( DRM_IOCTL_ARGS ) static int r128_cce_swap( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1390,7 +1369,7 @@ int r128_cce_swap( DRM_IOCTL_ARGS ) ...@@ -1390,7 +1369,7 @@ int r128_cce_swap( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int r128_cce_vertex( DRM_IOCTL_ARGS ) static int r128_cce_vertex( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1450,7 +1429,7 @@ int r128_cce_vertex( DRM_IOCTL_ARGS ) ...@@ -1450,7 +1429,7 @@ int r128_cce_vertex( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int r128_cce_indices( DRM_IOCTL_ARGS ) static int r128_cce_indices( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1522,7 +1501,7 @@ int r128_cce_indices( DRM_IOCTL_ARGS ) ...@@ -1522,7 +1501,7 @@ int r128_cce_indices( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int r128_cce_blit( DRM_IOCTL_ARGS ) static int r128_cce_blit( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_device_dma_t *dma = dev->dma; drm_device_dma_t *dma = dev->dma;
...@@ -1552,7 +1531,7 @@ int r128_cce_blit( DRM_IOCTL_ARGS ) ...@@ -1552,7 +1531,7 @@ int r128_cce_blit( DRM_IOCTL_ARGS )
return ret; return ret;
} }
int r128_cce_depth( DRM_IOCTL_ARGS ) static int r128_cce_depth( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1582,7 +1561,7 @@ int r128_cce_depth( DRM_IOCTL_ARGS ) ...@@ -1582,7 +1561,7 @@ int r128_cce_depth( DRM_IOCTL_ARGS )
return ret; return ret;
} }
int r128_cce_stipple( DRM_IOCTL_ARGS ) static int r128_cce_stipple( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1606,7 +1585,7 @@ int r128_cce_stipple( DRM_IOCTL_ARGS ) ...@@ -1606,7 +1585,7 @@ int r128_cce_stipple( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int r128_cce_indirect( DRM_IOCTL_ARGS ) static int r128_cce_indirect( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1682,7 +1661,7 @@ int r128_cce_indirect( DRM_IOCTL_ARGS ) ...@@ -1682,7 +1661,7 @@ int r128_cce_indirect( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int r128_getparam( DRM_IOCTL_ARGS ) static int r128_getparam( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private; drm_r128_private_t *dev_priv = dev->dev_private;
...@@ -1730,3 +1709,24 @@ void r128_driver_pretakedown(drm_device_t *dev) ...@@ -1730,3 +1709,24 @@ void r128_driver_pretakedown(drm_device_t *dev)
r128_do_cleanup_cce( dev ); r128_do_cleanup_cce( dev );
} }
drm_ioctl_desc_t r128_ioctls[] = {
[DRM_IOCTL_NR(DRM_R128_INIT)] = { r128_cce_init, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_START)] = { r128_cce_start, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = { r128_cce_stop, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = { r128_cce_reset, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = { r128_cce_idle, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_RESET)] = { r128_engine_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = { r128_fullscreen, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_SWAP)] = { r128_cce_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_FLIP)] = { r128_cce_flip, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_CLEAR)] = { r128_cce_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_VERTEX)] = { r128_cce_vertex, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_INDICES)] = { r128_cce_indices, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_BLIT)] = { r128_cce_blit, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_DEPTH)] = { r128_cce_depth, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_STIPPLE)] = { r128_cce_stipple, 1, 0 },
[DRM_IOCTL_NR(DRM_R128_INDIRECT)] = { r128_cce_indirect, 1, 1 },
[DRM_IOCTL_NR(DRM_R128_GETPARAM)] = { r128_getparam, 1, 0 },
};
int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
drivers/char/drm/radeon_cp.c
View file @ fe8ebee1
...@@ -35,6 +35,7 @@ ...@@ -35,6 +35,7 @@
#define RADEON_FIFO_DEBUG 0 #define RADEON_FIFO_DEBUG 0
static int radeon_do_cleanup_cp( drm_device_t *dev );
/* CP microcode (from ATI) */ /* CP microcode (from ATI) */
static u32 R200_cp_microcode[][2] = { static u32 R200_cp_microcode[][2] = {
...@@ -815,7 +816,7 @@ static u32 R300_cp_microcode[][2] = { ...@@ -815,7 +816,7 @@ static u32 R300_cp_microcode[][2] = {
{ 0000000000, 0000000000 }, { 0000000000, 0000000000 },
}; };
int RADEON_READ_PLL(drm_device_t *dev, int addr) static int RADEON_READ_PLL(drm_device_t *dev, int addr)
{ {
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -1538,7 +1539,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init ) ...@@ -1538,7 +1539,7 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
return 0; return 0;
} }
int radeon_do_cleanup_cp( drm_device_t *dev ) static int radeon_do_cleanup_cp( drm_device_t *dev )
{ {
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "\n" ); DRM_DEBUG( "\n" );
......
drivers/char/drm/radeon_drv.h
View file @ fe8ebee1
...@@ -284,42 +284,20 @@ extern drm_buf_t *radeon_freelist_get( drm_device_t *dev ); ...@@ -284,42 +284,20 @@ extern drm_buf_t *radeon_freelist_get( drm_device_t *dev );
extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n ); extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n );
extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv ); extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv );
extern int radeon_do_cleanup_cp( drm_device_t *dev );
extern int radeon_do_cleanup_pageflip( drm_device_t *dev );
extern int radeon_driver_preinit(struct drm_device *dev, unsigned long flags); extern int radeon_driver_preinit(struct drm_device *dev, unsigned long flags);
extern int radeon_driver_postcleanup(struct drm_device *dev); extern int radeon_driver_postcleanup(struct drm_device *dev);
/* radeon_state.c */
extern int radeon_cp_clear( DRM_IOCTL_ARGS );
extern int radeon_cp_swap( DRM_IOCTL_ARGS );
extern int radeon_cp_vertex( DRM_IOCTL_ARGS );
extern int radeon_cp_indices( DRM_IOCTL_ARGS );
extern int radeon_cp_texture( DRM_IOCTL_ARGS );
extern int radeon_cp_stipple( DRM_IOCTL_ARGS );
extern int radeon_cp_indirect( DRM_IOCTL_ARGS );
extern int radeon_cp_vertex2( DRM_IOCTL_ARGS );
extern int radeon_cp_cmdbuf( DRM_IOCTL_ARGS );
extern int radeon_cp_getparam( DRM_IOCTL_ARGS );
extern int radeon_cp_setparam( DRM_IOCTL_ARGS );
extern int radeon_cp_flip( DRM_IOCTL_ARGS );
extern int radeon_mem_alloc( DRM_IOCTL_ARGS ); extern int radeon_mem_alloc( DRM_IOCTL_ARGS );
extern int radeon_mem_free( DRM_IOCTL_ARGS ); extern int radeon_mem_free( DRM_IOCTL_ARGS );
extern int radeon_mem_init_heap( DRM_IOCTL_ARGS ); extern int radeon_mem_init_heap( DRM_IOCTL_ARGS );
extern void radeon_mem_takedown( struct mem_block **heap ); extern void radeon_mem_takedown( struct mem_block **heap );
extern void radeon_mem_release( DRMFILE filp, struct mem_block *heap ); extern void radeon_mem_release( DRMFILE filp, struct mem_block *heap );
extern int radeon_surface_alloc(DRM_IOCTL_ARGS);
extern int radeon_surface_free(DRM_IOCTL_ARGS);
/* radeon_irq.c */ /* radeon_irq.c */
extern int radeon_irq_emit( DRM_IOCTL_ARGS ); extern int radeon_irq_emit( DRM_IOCTL_ARGS );
extern int radeon_irq_wait( DRM_IOCTL_ARGS ); extern int radeon_irq_wait( DRM_IOCTL_ARGS );
extern int radeon_emit_and_wait_irq(drm_device_t *dev);
extern int radeon_wait_irq(drm_device_t *dev, int swi_nr);
extern int radeon_emit_irq(drm_device_t *dev);
extern void radeon_do_release(drm_device_t *dev); extern void radeon_do_release(drm_device_t *dev);
extern int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence); extern int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence);
extern irqreturn_t radeon_driver_irq_handler( DRM_IRQ_ARGS ); extern irqreturn_t radeon_driver_irq_handler( DRM_IRQ_ARGS );
...@@ -860,9 +838,6 @@ do { \ ...@@ -860,9 +838,6 @@ do { \
RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \ RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \
} while (0) } while (0)
extern int RADEON_READ_PLL( drm_device_t *dev, int addr );
#define CP_PACKET0( reg, n ) \ #define CP_PACKET0( reg, n ) \
(RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2)) (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
#define CP_PACKET0_TABLE( reg, n ) \ #define CP_PACKET0_TABLE( reg, n ) \
......
drivers/char/drm/radeon_irq.c
View file @ fe8ebee1
...@@ -93,7 +93,7 @@ static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv) ...@@ -93,7 +93,7 @@ static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv)
RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp ); RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp );
} }
int radeon_emit_irq(drm_device_t *dev) static int radeon_emit_irq(drm_device_t *dev)
{ {
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
unsigned int ret; unsigned int ret;
...@@ -112,7 +112,7 @@ int radeon_emit_irq(drm_device_t *dev) ...@@ -112,7 +112,7 @@ int radeon_emit_irq(drm_device_t *dev)
} }
int radeon_wait_irq(drm_device_t *dev, int swi_nr) static int radeon_wait_irq(drm_device_t *dev, int swi_nr)
{ {
drm_radeon_private_t *dev_priv = drm_radeon_private_t *dev_priv =
(drm_radeon_private_t *)dev->dev_private; (drm_radeon_private_t *)dev->dev_private;
...@@ -134,12 +134,6 @@ int radeon_wait_irq(drm_device_t *dev, int swi_nr) ...@@ -134,12 +134,6 @@ int radeon_wait_irq(drm_device_t *dev, int swi_nr)
return ret; return ret;
} }
int radeon_emit_and_wait_irq(drm_device_t *dev)
{
return radeon_wait_irq( dev, radeon_emit_irq(dev) );
}
int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence) int radeon_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence)
{ {
drm_radeon_private_t *dev_priv = drm_radeon_private_t *dev_priv =
......
drivers/char/drm/radeon_state.c
View file @ fe8ebee1
...@@ -33,38 +33,6 @@ ...@@ -33,38 +33,6 @@
#include "radeon_drm.h" #include "radeon_drm.h"
#include "radeon_drv.h" #include "radeon_drv.h"
drm_ioctl_desc_t radeon_ioctls[] = {
[DRM_IOCTL_NR(DRM_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_START)] = { radeon_cp_start, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_CP_RESUME)] = { radeon_cp_resume, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_RESET)] = { radeon_engine_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_FREE)] = { radeon_mem_free, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_INIT_HEAP)] = { radeon_mem_init_heap,1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SETPARAM)] = { radeon_cp_setparam, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SURF_ALLOC)] = { radeon_surface_alloc,1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SURF_FREE)] = { radeon_surface_free, 1, 0 }
};
int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
/* ================================================================ /* ================================================================
* Helper functions for client state checking and fixup * Helper functions for client state checking and fixup
*/ */
...@@ -1864,7 +1832,7 @@ static void radeon_surfaces_release(DRMFILE filp, drm_radeon_private_t *dev_priv ...@@ -1864,7 +1832,7 @@ static void radeon_surfaces_release(DRMFILE filp, drm_radeon_private_t *dev_priv
/* ================================================================ /* ================================================================
* IOCTL functions * IOCTL functions
*/ */
int radeon_surface_alloc(DRM_IOCTL_ARGS) static int radeon_surface_alloc(DRM_IOCTL_ARGS)
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -1884,7 +1852,7 @@ int radeon_surface_alloc(DRM_IOCTL_ARGS) ...@@ -1884,7 +1852,7 @@ int radeon_surface_alloc(DRM_IOCTL_ARGS)
return 0; return 0;
} }
int radeon_surface_free(DRM_IOCTL_ARGS) static int radeon_surface_free(DRM_IOCTL_ARGS)
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -1904,7 +1872,7 @@ int radeon_surface_free(DRM_IOCTL_ARGS) ...@@ -1904,7 +1872,7 @@ int radeon_surface_free(DRM_IOCTL_ARGS)
return 0; return 0;
} }
int radeon_cp_clear( DRM_IOCTL_ARGS ) static int radeon_cp_clear( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -1961,7 +1929,7 @@ static int radeon_do_init_pageflip( drm_device_t *dev ) ...@@ -1961,7 +1929,7 @@ static int radeon_do_init_pageflip( drm_device_t *dev )
/* Called whenever a client dies, from drm_release. /* Called whenever a client dies, from drm_release.
* NOTE: Lock isn't necessarily held when this is called! * NOTE: Lock isn't necessarily held when this is called!
*/ */
int radeon_do_cleanup_pageflip( drm_device_t *dev ) static int radeon_do_cleanup_pageflip( drm_device_t *dev )
{ {
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "\n" ); DRM_DEBUG( "\n" );
...@@ -1976,7 +1944,7 @@ int radeon_do_cleanup_pageflip( drm_device_t *dev ) ...@@ -1976,7 +1944,7 @@ int radeon_do_cleanup_pageflip( drm_device_t *dev )
/* Swapping and flipping are different operations, need different ioctls. /* Swapping and flipping are different operations, need different ioctls.
* They can & should be intermixed to support multiple 3d windows. * They can & should be intermixed to support multiple 3d windows.
*/ */
int radeon_cp_flip( DRM_IOCTL_ARGS ) static int radeon_cp_flip( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -1995,7 +1963,7 @@ int radeon_cp_flip( DRM_IOCTL_ARGS ) ...@@ -1995,7 +1963,7 @@ int radeon_cp_flip( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_swap( DRM_IOCTL_ARGS ) static int radeon_cp_swap( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2016,7 +1984,7 @@ int radeon_cp_swap( DRM_IOCTL_ARGS ) ...@@ -2016,7 +1984,7 @@ int radeon_cp_swap( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_vertex( DRM_IOCTL_ARGS ) static int radeon_cp_vertex( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2101,7 +2069,7 @@ int radeon_cp_vertex( DRM_IOCTL_ARGS ) ...@@ -2101,7 +2069,7 @@ int radeon_cp_vertex( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_indices( DRM_IOCTL_ARGS ) static int radeon_cp_indices( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2203,7 +2171,7 @@ int radeon_cp_indices( DRM_IOCTL_ARGS ) ...@@ -2203,7 +2171,7 @@ int radeon_cp_indices( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_texture( DRM_IOCTL_ARGS ) static int radeon_cp_texture( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2234,7 +2202,7 @@ int radeon_cp_texture( DRM_IOCTL_ARGS ) ...@@ -2234,7 +2202,7 @@ int radeon_cp_texture( DRM_IOCTL_ARGS )
return ret; return ret;
} }
int radeon_cp_stipple( DRM_IOCTL_ARGS ) static int radeon_cp_stipple( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2257,7 +2225,7 @@ int radeon_cp_stipple( DRM_IOCTL_ARGS ) ...@@ -2257,7 +2225,7 @@ int radeon_cp_stipple( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_indirect( DRM_IOCTL_ARGS ) static int radeon_cp_indirect( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2332,7 +2300,7 @@ int radeon_cp_indirect( DRM_IOCTL_ARGS ) ...@@ -2332,7 +2300,7 @@ int radeon_cp_indirect( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_vertex2( DRM_IOCTL_ARGS ) static int radeon_cp_vertex2( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2661,7 +2629,7 @@ static int radeon_emit_wait( drm_device_t *dev, int flags ) ...@@ -2661,7 +2629,7 @@ static int radeon_emit_wait( drm_device_t *dev, int flags )
return 0; return 0;
} }
int radeon_cp_cmdbuf( DRM_IOCTL_ARGS ) static int radeon_cp_cmdbuf( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2813,7 +2781,7 @@ int radeon_cp_cmdbuf( DRM_IOCTL_ARGS ) ...@@ -2813,7 +2781,7 @@ int radeon_cp_cmdbuf( DRM_IOCTL_ARGS )
int radeon_cp_getparam( DRM_IOCTL_ARGS ) static int radeon_cp_getparam( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
...@@ -2887,7 +2855,7 @@ int radeon_cp_getparam( DRM_IOCTL_ARGS ) ...@@ -2887,7 +2855,7 @@ int radeon_cp_getparam( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int radeon_cp_setparam( DRM_IOCTL_ARGS ) { static int radeon_cp_setparam( DRM_IOCTL_ARGS ) {
DRM_DEVICE; DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private; drm_radeon_private_t *dev_priv = dev->dev_private;
drm_file_t *filp_priv; drm_file_t *filp_priv;
...@@ -2980,3 +2948,35 @@ void radeon_driver_free_filp_priv(drm_device_t *dev, drm_file_t *filp_priv) ...@@ -2980,3 +2948,35 @@ void radeon_driver_free_filp_priv(drm_device_t *dev, drm_file_t *filp_priv)
drm_free(radeon_priv, sizeof(*radeon_priv), DRM_MEM_FILES); drm_free(radeon_priv, sizeof(*radeon_priv), DRM_MEM_FILES);
} }
drm_ioctl_desc_t radeon_ioctls[] = {
[DRM_IOCTL_NR(DRM_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_START)] = { radeon_cp_start, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_CP_RESUME)] = { radeon_cp_resume, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_RESET)] = { radeon_engine_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_FREE)] = { radeon_mem_free, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_INIT_HEAP)] = { radeon_mem_init_heap,1, 1 },
[DRM_IOCTL_NR(DRM_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SETPARAM)] = { radeon_cp_setparam, 1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SURF_ALLOC)] = { radeon_surface_alloc,1, 0 },
[DRM_IOCTL_NR(DRM_RADEON_SURF_FREE)] = { radeon_surface_free, 1, 0 }
};
int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
drivers/char/drm/sis_drv.h
View file @ fe8ebee1
...@@ -46,13 +46,6 @@ typedef struct drm_sis_private { ...@@ -46,13 +46,6 @@ typedef struct drm_sis_private {
memHeap_t *FBHeap; memHeap_t *FBHeap;
} drm_sis_private_t; } drm_sis_private_t;
extern int sis_fb_alloc( DRM_IOCTL_ARGS );
extern int sis_fb_free( DRM_IOCTL_ARGS );
extern int sis_ioctl_agp_init( DRM_IOCTL_ARGS );
extern int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS );
extern int sis_ioctl_agp_free( DRM_IOCTL_ARGS );
extern int sis_fb_init( DRM_IOCTL_ARGS );
extern int sis_init_context(drm_device_t *dev, int context); extern int sis_init_context(drm_device_t *dev, int context);
extern int sis_final_context(drm_device_t *dev, int context); extern int sis_final_context(drm_device_t *dev, int context);
......
drivers/char/drm/sis_ds.c
View file @ fe8ebee1
...@@ -194,32 +194,6 @@ int mmBlockInHeap(memHeap_t *heap, PMemBlock b) ...@@ -194,32 +194,6 @@ int mmBlockInHeap(memHeap_t *heap, PMemBlock b)
return 0; return 0;
} }
/* Kludgey workaround for existing i810 server. Remove soon.
*/
memHeap_t *mmAddRange( memHeap_t *heap,
int ofs,
int size )
{
PMemBlock blocks;
blocks = (TMemBlock *)drm_calloc(2, sizeof(TMemBlock), DRM_MEM_DRIVER);
if (blocks != NULL) {
blocks[0].size = size;
blocks[0].free = 1;
blocks[0].ofs = ofs;
blocks[0].next = &blocks[1];
/* Discontinuity - stops JoinBlock from trying to join
* non-adjacent ranges.
*/
blocks[1].size = 0;
blocks[1].free = 0;
blocks[1].ofs = ofs+size;
blocks[1].next = (PMemBlock)heap;
return (memHeap_t *)blocks;
} else
return heap;
}
static TMemBlock* SliceBlock(TMemBlock *p, static TMemBlock* SliceBlock(TMemBlock *p,
int startofs, int size, int startofs, int size,
int reserved, int alignment) int reserved, int alignment)
...@@ -325,61 +299,3 @@ int mmFreeMem(PMemBlock b) ...@@ -325,61 +299,3 @@ int mmFreeMem(PMemBlock b)
return 0; return 0;
} }
int mmReserveMem(memHeap_t *heap, int offset,int size)
{
int endofs;
TMemBlock *p;
if (heap == NULL || size <= 0)
return -1;
endofs = offset + size;
p = (TMemBlock *)heap;
while (p && p->ofs <= offset) {
if (ISFREE(p) && endofs <= (p->ofs+p->size)) {
SliceBlock(p,offset,size,1,1);
return 0;
}
p = p->next;
}
return -1;
}
int mmFreeReserved(memHeap_t *heap, int offset)
{
TMemBlock *p,*prev;
if (heap == NULL)
return -1;
p = (TMemBlock *)heap;
prev = NULL;
while (p != NULL && p->ofs != offset) {
prev = p;
p = p->next;
}
if (p == NULL || !p->reserved)
return -1;
p->free = 1;
p->reserved = 0;
Join2Blocks(p);
if (prev != NULL)
Join2Blocks(prev);
return 0;
}
void mmDestroy(memHeap_t *heap)
{
TMemBlock *p,*q;
if (heap == NULL)
return;
p = (TMemBlock *)heap;
while (p != NULL) {
q = p->next;
drm_free(p, sizeof(TMemBlock), DRM_MEM_DRIVER);
p = q;
}
}
drivers/char/drm/sis_ds.h
View file @ fe8ebee1
...@@ -115,10 +115,6 @@ static __inline__ void mmMarkReserved(PMemBlock b) ...@@ -115,10 +115,6 @@ static __inline__ void mmMarkReserved(PMemBlock b)
*/ */
memHeap_t *mmInit( int ofs, int size ); memHeap_t *mmInit( int ofs, int size );
memHeap_t *mmAddRange( memHeap_t *heap,
int ofs,
int size );
/* /*
* Allocate 'size' bytes with 2^align2 bytes alignment, * Allocate 'size' bytes with 2^align2 bytes alignment,
* restrict the search to free memory after 'startSearch' * restrict the search to free memory after 'startSearch'
...@@ -143,21 +139,6 @@ int mmBlockInHeap( PMemBlock heap, PMemBlock b ); ...@@ -143,21 +139,6 @@ int mmBlockInHeap( PMemBlock heap, PMemBlock b );
*/ */
int mmFreeMem( PMemBlock b ); int mmFreeMem( PMemBlock b );
/*
* Reserve 'size' bytes block start at offset
* This is used to prevent allocation of memory already used
* by the X server for the front buffer, pixmaps, and cursor
* input: size, offset
* output: 0 if OK, -1 if error
*/
int mmReserveMem( memHeap_t *heap, int offset,int size );
int mmFreeReserved( memHeap_t *heap, int offset );
/*
* destroy MM
*/
void mmDestroy( memHeap_t *mmInit );
/* For debuging purpose. */ /* For debuging purpose. */
void mmDumpMemInfo( memHeap_t *mmInit ); void mmDumpMemInfo( memHeap_t *mmInit );
......
drivers/char/drm/sis_mm.c
View file @ fe8ebee1
...@@ -36,17 +36,6 @@ ...@@ -36,17 +36,6 @@
#include <video/sisfb.h> #include <video/sisfb.h>
#endif #endif
drm_ioctl_desc_t sis_ioctls[] = {
[DRM_IOCTL_NR(DRM_SIS_FB_ALLOC)] = { sis_fb_alloc, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_FB_FREE)] = { sis_fb_free, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_AGP_INIT)] = { sis_ioctl_agp_init, 1, 1 },
[DRM_IOCTL_NR(DRM_SIS_AGP_ALLOC)] = { sis_ioctl_agp_alloc, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_AGP_FREE)] = { sis_ioctl_agp_free, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_FB_INIT)] = { sis_fb_init, 1, 1 }
};
int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
#define MAX_CONTEXT 100 #define MAX_CONTEXT 100
#define VIDEO_TYPE 0 #define VIDEO_TYPE 0
#define AGP_TYPE 1 #define AGP_TYPE 1
...@@ -91,12 +80,12 @@ static int del_alloc_set(int context, int type, unsigned int val) ...@@ -91,12 +80,12 @@ static int del_alloc_set(int context, int type, unsigned int val)
/* fb management via fb device */ /* fb management via fb device */
#if defined(__linux__) && defined(CONFIG_FB_SIS) #if defined(__linux__) && defined(CONFIG_FB_SIS)
int sis_fb_init( DRM_IOCTL_ARGS ) static int sis_fb_init( DRM_IOCTL_ARGS )
{ {
return 0; return 0;
} }
int sis_fb_alloc( DRM_IOCTL_ARGS ) static int sis_fb_alloc( DRM_IOCTL_ARGS )
{ {
drm_sis_mem_t fb; drm_sis_mem_t fb;
struct sis_memreq req; struct sis_memreq req;
...@@ -129,7 +118,7 @@ int sis_fb_alloc( DRM_IOCTL_ARGS ) ...@@ -129,7 +118,7 @@ int sis_fb_alloc( DRM_IOCTL_ARGS )
return retval; return retval;
} }
int sis_fb_free( DRM_IOCTL_ARGS ) static int sis_fb_free( DRM_IOCTL_ARGS )
{ {
drm_sis_mem_t fb; drm_sis_mem_t fb;
int retval = 0; int retval = 0;
...@@ -160,7 +149,7 @@ int sis_fb_free( DRM_IOCTL_ARGS ) ...@@ -160,7 +149,7 @@ int sis_fb_free( DRM_IOCTL_ARGS )
* X driver/sisfb HW- Command- * X driver/sisfb HW- Command-
* framebuffer memory DRI heap Cursor queue * framebuffer memory DRI heap Cursor queue
*/ */
int sis_fb_init( DRM_IOCTL_ARGS ) static int sis_fb_init( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private; drm_sis_private_t *dev_priv = dev->dev_private;
...@@ -186,7 +175,7 @@ int sis_fb_init( DRM_IOCTL_ARGS ) ...@@ -186,7 +175,7 @@ int sis_fb_init( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int sis_fb_alloc( DRM_IOCTL_ARGS ) static int sis_fb_alloc( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private; drm_sis_private_t *dev_priv = dev->dev_private;
...@@ -223,7 +212,7 @@ int sis_fb_alloc( DRM_IOCTL_ARGS ) ...@@ -223,7 +212,7 @@ int sis_fb_alloc( DRM_IOCTL_ARGS )
return retval; return retval;
} }
int sis_fb_free( DRM_IOCTL_ARGS ) static int sis_fb_free( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private; drm_sis_private_t *dev_priv = dev->dev_private;
...@@ -250,7 +239,7 @@ int sis_fb_free( DRM_IOCTL_ARGS ) ...@@ -250,7 +239,7 @@ int sis_fb_free( DRM_IOCTL_ARGS )
/* agp memory management */ /* agp memory management */
int sis_ioctl_agp_init( DRM_IOCTL_ARGS ) static int sis_ioctl_agp_init( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private; drm_sis_private_t *dev_priv = dev->dev_private;
...@@ -276,7 +265,7 @@ int sis_ioctl_agp_init( DRM_IOCTL_ARGS ) ...@@ -276,7 +265,7 @@ int sis_ioctl_agp_init( DRM_IOCTL_ARGS )
return 0; return 0;
} }
int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS ) static int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private; drm_sis_private_t *dev_priv = dev->dev_private;
...@@ -313,7 +302,7 @@ int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS ) ...@@ -313,7 +302,7 @@ int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS )
return retval; return retval;
} }
int sis_ioctl_agp_free( DRM_IOCTL_ARGS ) static int sis_ioctl_agp_free( DRM_IOCTL_ARGS )
{ {
DRM_DEVICE; DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private; drm_sis_private_t *dev_priv = dev->dev_private;
...@@ -414,3 +403,15 @@ int sis_final_context(struct drm_device *dev, int context) ...@@ -414,3 +403,15 @@ int sis_final_context(struct drm_device *dev, int context)
return 1; return 1;
} }
drm_ioctl_desc_t sis_ioctls[] = {
[DRM_IOCTL_NR(DRM_SIS_FB_ALLOC)] = { sis_fb_alloc, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_FB_FREE)] = { sis_fb_free, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_AGP_INIT)] = { sis_ioctl_agp_init, 1, 1 },
[DRM_IOCTL_NR(DRM_SIS_AGP_ALLOC)] = { sis_ioctl_agp_alloc, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_AGP_FREE)] = { sis_ioctl_agp_free, 1, 0 },
[DRM_IOCTL_NR(DRM_SIS_FB_INIT)] = { sis_fb_init, 1, 1 }
};
int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7