Commit ff50e15b authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: added voltage boot time calibration

Run AFLL BTC after upload pptable and before enabling
all smu features.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent efa7ac67
...@@ -756,6 +756,11 @@ static int vega20_set_allowed_featuresmask(struct pp_hwmgr *hwmgr) ...@@ -756,6 +756,11 @@ static int vega20_set_allowed_featuresmask(struct pp_hwmgr *hwmgr)
return 0; return 0;
} }
static int vega20_run_btc_afll(struct pp_hwmgr *hwmgr)
{
return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAfllBtc);
}
static int vega20_enable_all_smu_features(struct pp_hwmgr *hwmgr) static int vega20_enable_all_smu_features(struct pp_hwmgr *hwmgr)
{ {
struct vega20_hwmgr *data = struct vega20_hwmgr *data =
...@@ -1391,6 +1396,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr) ...@@ -1391,6 +1396,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
"[EnableDPMTasks] Failed to initialize SMC table!", "[EnableDPMTasks] Failed to initialize SMC table!",
return result); return result);
result = vega20_run_btc_afll(hwmgr);
PP_ASSERT_WITH_CODE(!result,
"[EnableDPMTasks] Failed to run btc afll!",
return result);
result = vega20_enable_all_smu_features(hwmgr); result = vega20_enable_all_smu_features(hwmgr);
PP_ASSERT_WITH_CODE(!result, PP_ASSERT_WITH_CODE(!result,
"[EnableDPMTasks] Failed to enable all smu features!", "[EnableDPMTasks] Failed to enable all smu features!",
......
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