- 24 Sep, 2020 1 commit
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Ray Jui authored
iProc chips have QSPI controller that does not have the MSPI_REV offset. Reading from that offset will cause a bus error. Fix it by having MSPI_REV query disabled in the generic compatible string. Fixes: 3a01f04d ("spi: bcm-qspi: Handle lack of MSPI_REV offset") Link: https://lore.kernel.org/linux-arm-kernel/20200909211857.4144718-1-f.fainelli@gmail.com/T/#uSigned-off-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200910152539.45584-3-ray.jui@broadcom.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 23 Sep, 2020 1 commit
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Sascha Hauer authored
spi_unregister_controller() not only unregisters the controller, but also frees the controller. This will free the driver data with it, so we must not access it later dspi_remove(). Solve this by allocating the driver data separately from the SPI controller. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20200923131026.20707-1-s.hauer@pengutronix.deSigned-off-by: Mark Brown <broonie@kernel.org>
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- 21 Sep, 2020 1 commit
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Chris Packham authored
The SPIE register contains counts for the TX FIFO so any time the irq handler was invoked we would attempt to process the RX/TX fifos. Use the SPIM value to mask the events so that we only process interrupts that were expected. This was a latent issue exposed by commit 3282a3da ("powerpc/64: Implement soft interrupt replay in C"). Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20200904002812.7300-1-chris.packham@alliedtelesis.co.nzSigned-off-by: Mark Brown <broonie@kernel.org>
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- 15 Sep, 2020 1 commit
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Jason Yan authored
This eliminates the following sparse warning: drivers/spi/spi-bcm2835.c:78:14: warning: symbol 'polling_limit_us' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jason Yan <yanaijie@huawei.com> Link: https://lore.kernel.org/r/20200912072211.602735-1-yanaijie@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 11 Sep, 2020 1 commit
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Vladimir Oltean authored
The arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi device tree lacks DMA channels for DSPI, so naturally, the driver fails to probe: [ 2.945302] fsl-dspi 2100000.spi: rx dma channel not available [ 2.951134] fsl-dspi 2100000.spi: can't get dma channels In retrospect, this should have been obvious, because LS2080A, LS2085A LS2088A and LX2160A don't appear to have an eDMA module at all. Looking again at their datasheets, the CTARE register (which is specific to XSPI functionality) seems to be documented, so switch them to XSPI mode instead. Fixes: 0feaf8f5 ("spi: spi-fsl-dspi: Convert the instantiations that support it to DMA") Reported-by: Qiang Zhao <qiang.zhao@nxp.com> Tested-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20200910121532.1138596-1-olteanv@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 09 Sep, 2020 2 commits
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Dan Carpenter authored
The pm_runtime_get_sync() can return either 0 or 1 on success but this code treats 1 as a failure. Fixes: db96bf97 ("spi: stm32: fixes suspend/resume management") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/20200909094304.GA420136@mwandaSigned-off-by: Mark Brown <broonie@kernel.org>
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Gustav Wiklander authored
In the prepare_message callback the bus driver has the opportunity to split a transfer into smaller chunks. spi_map_msg is done after prepare_message. Function spi_res_release releases the splited transfers in the message. Therefore spi_res_release should be called after spi_map_msg. The previous try at this was commit c9ba7a16 which released the splited transfers after spi_finalize_current_message had been called. This introduced a race since the message struct could be out of scope because the spi_sync call got completed. Fixes this leak on spi bus driver spi-bcm2835.c when transfer size is greater than 65532: Kmemleak: sg_alloc_table+0x28/0xc8 spi_map_buf+0xa4/0x300 __spi_pump_messages+0x370/0x748 __spi_sync+0x1d4/0x270 spi_sync+0x34/0x58 spi_test_execute_msg+0x60/0x340 [spi_loopback_test] spi_test_run_iter+0x548/0x578 [spi_loopback_test] spi_test_run_test+0x94/0x140 [spi_loopback_test] spi_test_run_tests+0x150/0x180 [spi_loopback_test] spi_loopback_test_probe+0x50/0xd0 [spi_loopback_test] spi_drv_probe+0x84/0xe0 Signed-off-by: Gustav Wiklander <gustavwi@axis.com> Link: https://lore.kernel.org/r/20200908151129.15915-1-gustav.wiklander@axis.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 08 Sep, 2020 1 commit
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Vignesh Raghavendra authored
Buffers need to mapped to DMA channel's device pointer instead of SPI controller's device pointer as its system DMA that actually does data transfer. Data inconsistencies have been reported when reading from flash without this fix. Fixes: ffa639e0 ("mtd: spi-nor: cadence-quadspi: Add DMA support for direct mode reads") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20200831130720.4524-1-vigneshr@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 07 Sep, 2020 1 commit
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Marek Vasut authored
The 'spi_stm32 44004000.spi: Communication suspended' message means that when using PIO, the kernel did not read the FIFO fast enough and so the SPI controller paused the transfer. Currently, this is printed on every single such event, so if the kernel is busy and the controller is pausing the transfers often, the kernel will be all the more busy scrolling this message into the log buffer every few milliseconds. That is not helpful. Instead, rate-limit the message and print it every once in a while. It is not possible to use the default dev_warn_ratelimited(), because that is still too verbose, as it prints 10 lines (DEFAULT_RATELIMIT_BURST) every 5 seconds (DEFAULT_RATELIMIT_INTERVAL). The policy here is to print 1 line every 50 seconds (DEFAULT_RATELIMIT_INTERVAL * 10), because 1 line is more than enough and the cycles saved on printing are better left to the CPU to handle the SPI. However, dev_warn_once() is also not useful, as the user should be aware that this condition is possibly recurring or ongoing. Thus the custom rate-limit policy. Finally, turn the message from dev_warn() to dev_dbg(), since the system does not suffer any sort of malfunction if this message appears, it is just slowing down. This further reduces the printing into the log buffer and frees the CPU to do useful work. Fixes: dcbe0d84 ("spi: add driver for STM32 SPI controller") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Amelie Delaunay <amelie.delaunay@st.com> Cc: Antonio Borneo <borneo.antonio@gmail.com> Cc: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200905151913.117775-1-marex@denx.deSigned-off-by: Mark Brown <broonie@kernel.org>
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- 02 Sep, 2020 1 commit
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Vincent Whitchurch authored
The "tx/rx-transfer - crossing PAGE_SIZE" test always fails when len=131071 and rx_offset >= 5: spi-loopback-test spi0.0: Running test tx/rx-transfer - crossing PAGE_SIZE ... with iteration values: len = 131071, tx_off = 0, rx_off = 3 with iteration values: len = 131071, tx_off = 0, rx_off = 4 with iteration values: len = 131071, tx_off = 0, rx_off = 5 loopback strangeness - rx changed outside of allowed range at: ...a4321000 spi_msg@ffffffd5a4157690 frame_length: 131071 actual_length: 131071 spi_transfer@ffffffd5a41576f8 len: 131071 tx_buf: ffffffd5a4340ffc Note that rx_offset > 3 can only occur if the SPI controller driver sets ->dma_alignment to a higher value than 4, so most SPI controller drivers are not affect. The allocated Rx buffer is of size SPI_TEST_MAX_SIZE_PLUS, which is 132 KiB (assuming 4 KiB pages). This test uses an initial offset into the rx_buf of PAGE_SIZE - 4, and a len of 131071, so the range expected to be written in this transfer ends at (4096 - 4) + 5 + 131071 == 132 KiB, which is also the end of the allocated buffer. But the code which verifies the content of the buffer reads a byte beyond the allocated buffer and spuriously fails because this out-of-bounds read doesn't return the expected value. Fix this by using ITERATE_LEN instead of ITERATE_MAX_LEN to avoid testing sizes which cause out-of-bounds reads. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> Link: https://lore.kernel.org/r/20200902132341.7079-1-vincent.whitchurch@axis.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 25 Aug, 2020 1 commit
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Vignesh Raghavendra authored
Implement get_name() interface of spi_controller_mem_ops so as to avoid changing of mtd->name due to driver being moved over to spi-mem framework from SPI NOR. This avoids breaking of MTD cmdline args being passed by bootloaders which maybe using old driver name. Fixes: 31fb632b ("spi: Move cadence-quadspi driver to drivers/spi/") Reported-by: Jan Kiszka <jan.kiszka@siemens.com> Suggested-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200825172506.14375-1-vigneshr@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 24 Aug, 2020 1 commit
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Vladimir Oltean authored
Since I've introduced a fairly large diff to this driver since tag v5.4, I would like to avoid breakage for my use cases by getting a chance to be copied on newly submitted patches. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20200821213753.3143632-1-olteanv@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 10 Aug, 2020 7 commits
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Mark Brown authored
This serie is a reduced version of the serie [spi: stm32: various driver enhancements] previously sent. Alain Volmat (1): spi: stm32: always perform registers configuration prior to transfer Amelie Delaunay (3): spi: stm32: fix fifo threshold level in case of short transfer spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate spi: stm32: fixes suspend/resume management Antonio Borneo (1): spi: stm32h7: fix race condition at end of transfer drivers/spi/spi-stm32.c | 98 ++++++++++++++++++++++++++++++------------------- 1 file changed, 61 insertions(+), 37 deletions(-) -- v2: fix conditional statement within [spi: stm32: fix fifo threshold level in case of short transfer] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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Geert Uytterhoeven authored
When running "make dt_binding_check" (even if restricted to an unrelated binding document using DT_SCHEMA_FILES=...): Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml: ignoring, error in schema: properties: fsl,spi-only-use-cs1-sel warning: no schema found in file: Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml Fix this by adding a proper type definition for the vendor-specific fsl,spi-only-use-cs1-sel property. Fixes: 7ac9bbf6 ("dt-bindings: lpspi: New property in document DT bindings for LPSPI") Suggested-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200807121057.14204-1-geert+renesas@glider.beSigned-off-by: Mark Brown <broonie@kernel.org>
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Alain Volmat authored
SPI registers content may have been lost upon suspend/resume sequence. So, always compute and apply the necessary configuration in stm32_spi_transfer_one_setup routine. Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-6-git-send-email-alain.volmat@st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amelie Delaunay authored
This patch adds pinctrl power management, and reconfigure spi controller in case of resume. Fixes: 038ac869 ("spi: stm32: add runtime PM support") Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-5-git-send-email-alain.volmat@st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amelie Delaunay authored
Fix spi->clk_rate when it is odd to the nearest lowest even value because minimum SPI divider is 2. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-4-git-send-email-alain.volmat@st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amelie Delaunay authored
When transfer is shorter than half of the fifo, set the data packet size up to transfer size instead of up to half of the fifo. Check also that threshold is set at least to 1 data frame. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-3-git-send-email-alain.volmat@st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Antonio Borneo authored
The caller of stm32_spi_transfer_one(), spi_transfer_one_message(), is waiting for us to call spi_finalize_current_transfer() and will eventually schedule a new transfer, if available. We should guarantee that the spi controller is really available before calling spi_finalize_current_transfer(). Move the call to spi_finalize_current_transfer() _after_ the call to stm32_spi_disable(). Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-2-git-send-email-alain.volmat@st.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 05 Aug, 2020 1 commit
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Tobias Schramm authored
Previously the stm32h7 interrupt thread cleared all non-masked interrupts. If an interrupt was to occur during the handling of another interrupt its flag would be unset, resulting in a lost interrupt. This patches fixes the issue by clearing only the currently set interrupt flags. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> Link: https://lore.kernel.org/r/20200804195136.1485392-1-t.schramm@manjaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 03 Aug, 2020 1 commit
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Lukas Wunner authored
CONFIG_OF_DYNAMIC and CONFIG_ACPI allow adding SPI devices at runtime using a DeviceTree overlay or DSDT patch. CONFIG_SPI_SLAVE allows the same via sysfs. But there are no precautions to prevent adding a device below a controller that's being removed. Such a device is unusable and may not even be able to unbind cleanly as it becomes inaccessible once the controller has been torn down. E.g. it is then impossible to quiesce the device's interrupt. of_spi_notify() and acpi_spi_notify() do hold a ref on the controller, but otherwise run lockless against spi_unregister_controller(). Fix by holding the spi_add_lock in spi_unregister_controller() and bailing out of spi_add_device() if the controller has been unregistered concurrently. Fixes: ce79d54a ("spi/of: Add OF notifier handler") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v3.19+ Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Octavian Purdila <octavian.purdila@intel.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Link: https://lore.kernel.org/r/a8c3205088a969dc8410eec1eba9aface60f36af.1596451035.git.lukas@wunner.deSigned-off-by: Mark Brown <broonie@kernel.org>
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- 29 Jul, 2020 5 commits
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Mark Brown authored
Hi, This patchset mainly fixes some recently discovered problems about CS for LPSPI module on i.MX8DXLEVK. Add the dt-bindings description for the new property. Clark Wang (4): spi: lpspi: Fix kernel warning dump when probe fail after calling spi_register spi: lpspi: remove unused fsl_lpspi->chipselect spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK dt-bindings: lpspi: New property in document DT bindings for LPSPI .../bindings/spi/spi-fsl-lpspi.yaml | 7 ++++++ drivers/spi/spi-fsl-lpspi.c | 25 +++++++++++-------- 2 files changed, 21 insertions(+), 11 deletions(-) -- 2.17.1
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Clark Wang authored
Add "fsl,spi-only-use-cs1-sel" to fit i.MX8DXL-EVK. Spi common code does not support use of CS signals discontinuously. It only uses CS1 without using CS0. So, add this property to re-config chipselect value. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031513.31774-1-xiaoning.wang@nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Clark Wang authored
SPI common code does not support using CS discontinuously for now. However, i.MX8DXL-EVK only uses CS1 without CS0. Therefore, add a flag is_only_cs1 to set the correct TCR[PCS]. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031448.31661-4-xiaoning.wang@nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Clark Wang authored
The cs-gpio is initailized by spi_get_gpio_descs() now. Remove the chipselect. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031448.31661-3-xiaoning.wang@nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Clark Wang authored
Calling devm_spi_register_controller() too early will cause problem. When probe failed occurs after calling devm_spi_register_controller(), the call of spi_controller_put() will trigger the following warning dump. [ 2.092138] ------------[ cut here ]------------ [ 2.096876] kernfs: can not remove 'uevent', no directory [ 2.102440] WARNING: CPU: 0 PID: 181 at fs/kernfs/dir.c:1503 kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.111142] Modules linked in: [ 2.114207] CPU: 0 PID: 181 Comm: kworker/0:7 Not tainted 5.4.24-05024-g775c6e8a738c-dirty #1314 [ 2.122991] Hardware name: Freescale i.MX8DXL EVK (DT) [ 2.128141] Workqueue: events deferred_probe_work_func [ 2.133281] pstate: 60000005 (nZCv daif -PAN -UAO) [ 2.138076] pc : kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.142958] lr : kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.147837] sp : ffff8000122bba70 [ 2.151145] x29: ffff8000122bba70 x28: ffff8000119d6000 [ 2.156462] x27: 0000000000000000 x26: ffff800011edbce8 [ 2.161779] x25: 0000000000000000 x24: ffff00003ae4f700 [ 2.167096] x23: ffff000010184c10 x22: ffff00003a3d6200 [ 2.172412] x21: ffff800011a464a8 x20: ffff000010126a68 [ 2.177729] x19: ffff00003ae5c800 x18: 000000000000000e [ 2.183046] x17: 0000000000000001 x16: 0000000000000019 [ 2.188362] x15: 0000000000000004 x14: 000000000000004c [ 2.193679] x13: 0000000000000000 x12: 0000000000000001 [ 2.198996] x11: 0000000000000000 x10: 00000000000009c0 [ 2.204313] x9 : ffff8000122bb7a0 x8 : ffff00003a3d6c20 [ 2.209630] x7 : ffff00003a3d6380 x6 : 0000000000000001 [ 2.214946] x5 : 0000000000000001 x4 : ffff00003a05eb18 [ 2.220263] x3 : 0000000000000005 x2 : ffff8000119f1c48 [ 2.225580] x1 : 2bcbda323bf5a800 x0 : 0000000000000000 [ 2.230898] Call trace: [ 2.233345] kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.237879] sysfs_remove_file_ns+0x14/0x20 [ 2.242065] device_del+0x12c/0x348 [ 2.245555] device_unregister+0x14/0x30 [ 2.249492] spi_unregister_controller+0xac/0x120 [ 2.254201] devm_spi_unregister+0x10/0x18 [ 2.258304] release_nodes+0x1a8/0x220 [ 2.262055] devres_release_all+0x34/0x58 [ 2.266069] really_probe+0x1b8/0x318 [ 2.269733] driver_probe_device+0x54/0xe8 [ 2.273833] __device_attach_driver+0x80/0xb8 [ 2.278194] bus_for_each_drv+0x74/0xc0 [ 2.282034] __device_attach+0xdc/0x138 [ 2.285876] device_initial_probe+0x10/0x18 [ 2.290063] bus_probe_device+0x90/0x98 [ 2.293901] deferred_probe_work_func+0x64/0x98 [ 2.298442] process_one_work+0x198/0x320 [ 2.302451] worker_thread+0x1f0/0x420 [ 2.306208] kthread+0xf0/0x120 [ 2.309352] ret_from_fork+0x10/0x18 [ 2.312927] ---[ end trace 58abcdfae01bd3c7 ]--- So put this function at the end of the probe sequence. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031448.31661-2-xiaoning.wang@nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 28 Jul, 2020 5 commits
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Jon Lin authored
The RXFLR is possible larger than rx_left in Rockchip SPI, fix it. Fixes: 01b59ce5 ("spi: rockchip: use irq rather than polling") Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20200723004356.6390-3-jon.lin@rock-chips.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jon Lin authored
The FIFO depth of SPI V2 is 64 instead of 32, add support for it. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20200723004356.6390-2-jon.lin@rock-chips.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jon Lin authored
The burst length can be adjusted according to the transmission length to improve the transmission rate Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20200723004356.6390-1-jon.lin@rock-chips.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vaibhav Gupta authored
Before generic upgrade, both .suspend() and .resume() were invoking pci_enable_wake(pci_dev, PCI_D3hot, 0). Hence, disabling wakeup in both states. (Normal trend is .suspend() enables and .resume() disables the wakeup.) This was ambiguous and may be buggy. Instead of replicating the legacy behavior, drop the wakeup-disable call. Fixes: f185bcc7 ("spi: spi-topcliff-pch: use generic power management") Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200727172936.661567-1-vaibhavgupta40@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Christian Eggers authored
Simply copying all xfers from userspace into one bounce buffer causes alignment problems if the SPI controller uses DMA. Ensure that all transfer data blocks within the rx and tx bounce buffers are aligned for DMA (according to ARCH_KMALLOC_MINALIGN). Alignment may increase the usage of the bounce buffers. In some cases, the buffers may need to be increased using the "bufsiz" module parameter. Signed-off-by: Christian Eggers <ceggers@arri.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200728100832.24788-1-ceggers@arri.deSigned-off-by: Mark Brown <broonie@kernel.org>
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- 27 Jul, 2020 3 commits
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Colton Lewis authored
Silence documentation build warnings by correcting kernel-doc comment for spi_transfer struct. Signed-off-by: Colton Lewis <colton.w.lewis@protonmail.com> Link: https://lore.kernel.org/r/20200725050242.279548-1-colton.w.lewis@protonmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jonathan Liu authored
The spi-sun4i driver already has the ability to do large transfers. However, the max transfer size reported is still fifo depth - 1. Update the max transfer size reported to the max value possible. Fixes: 19673791 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by: Jonathan Liu <net147@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200727072328.510798-1-net147@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Clark Wang authored
Enable runtime pm support for spi-imx driver. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727063354.17031-1-xiaoning.wang@nxp.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 22 Jul, 2020 6 commits
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leilk.liu authored
Add a DT binding documentation for the MT8192 soc. Signed-off-by: leilk.liu <leilk.liu@mediatek.com> Link: https://lore.kernel.org/r/20200721122436.31544-1-leilk.liu@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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leilk.liu authored
This patch add spi support for mt8192 IC. Signed-off-by: leilk.liu <leilk.liu@mediatek.com> Link: https://lore.kernel.org/r/20200721122436.31544-2-leilk.liu@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Dilip Kota authored
Add support to SPI controller on Intel Atom based Lightning Mountain SoC which reuses the Lantiq SPI controller IP. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/7d644e5d03ef534f719763e5c823c1673e53d1a5.1594957019.git.eswara.kota@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Dilip Kota authored
Add support to SPI controller on Intel Atom based Lightning Mountain SoC which reuses Lantiq SPI controller IP. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/4d61a75381aca9479f9fc15d07a7b05534da6bb3.1594957019.git.eswara.kota@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Dilip Kota authored
Moving interrupt configuration to SoC specific data structure helps to add support for newer SoCs on which SPI controller with lesser interrupt lines compared to existing chipsets. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/7eb6d863515245fedfa0296c72082df107367d07.1594957019.git.eswara.kota@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Dilip Kota authored
On newer chipsets, SPI controller has fifos of larger size. So add the fifo size bit mask entry in SoC specific data structure. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/a0889abf17a9fbc7077f10be0f0342b7ebdf9361.1594957019.git.eswara.kota@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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