- 21 Jun, 2024 8 commits
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Martin Jocic authored
Make the short function kvaser_pciefd_set_tx_irq inline. This function is effectively three lines long and therefore inlining it should be OK according to rule #15 of the Linux kernel coding style. Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240614151524.2718287-5-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Martin Jocic authored
The code speaks for itself. Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240614151524.2718287-4-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Martin Jocic authored
This check is already done at the creation of the net devices in kvaser_pciefd_setup_can_ctrls called from kvaser_pciefd_probe. If it fails, the driver won't load, so there should be no need to repeat the check inside the ISR. The number of channels is read from the FPGA and should be trusted. Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240614151524.2718287-3-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Martin Jocic authored
Increases readability Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240614151524.2718287-2-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Marc Kleine-Budde authored
Martin Jocic <martin.jocic@kvaser.com> says: This patch series adds support for the following devices: * Vining 800 * Kvaser USBcan Pro 5xCAN * Kvaser Mini PCIe 1xCAN Link: https://lore.kernel.org/all/20240612141946.3352364-1-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Martin Jocic authored
Add support for Kvaser Mini PCIe 1xCAN, based on the hydra platform. Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240612141946.3352364-4-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Martin Jocic authored
Add support for Kvaser USBcan Pro 5xCAN, based on the hydra platform. Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240612141946.3352364-3-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Martin Jocic authored
Add support for Vining 800, a branded device based on the hydra platform. Signed-off-by: Martin Jocic <martin.jocic@kvaser.com> Link: https://lore.kernel.org/all/20240612141946.3352364-2-martin.jocic@kvaser.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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- 20 Jun, 2024 32 commits
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Dr. David Alan Gilbert authored
'mscan_state' is unused since the original commit afa17a50 ("net/can: add driver for mscan family & mpc52xx_mscan"). Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Reviewed-by: Simon Horman <horms@kernel.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/all/20240525232509.191735-1-linux@treblig.orgSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Marc Kleine-Budde authored
Francesco Valla <valla.francesco@gmail.com> says: While the in-kernel ISO 15765-2 (ISO-TP) stack is fully functional and easy to use, no documentation exists for it. This patch adds such documentation, containing the very basics of the protocol, the APIs and a basic example. Link: https://lore.kernel.org/all/20240501092413.414700-1-valla.francesco@gmail.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Francesco Valla authored
Document basic concepts, APIs and behaviour of the ISO 15675-2 (ISO-TP) CAN stack. Signed-off-by: Francesco Valla <valla.francesco@gmail.com> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Link: https://lore.kernel.org/all/20240501092413.414700-2-valla.francesco@gmail.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Marc Kleine-Budde authored
Harini T <harini.t@amd.com> says: Xilinx CAN driver supports AXI CAN, AXI CANFD, CANPS and CANFD PS IPs. 1. Modify the dt-bindings title to indicate that both controllers are supported. 2. Document all supported IPs in driver comment description. Link: https://lore.kernel.org/all/20240503060553.8520-1-harini.t@amd.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Harini T authored
Xilinx CAN driver supports AXI CAN, AXI CANFD, CANPS and CANFD PS IPs. Document all supported IPs in comment description. Signed-off-by: Harini T <harini.t@amd.com> Link: https://lore.kernel.org/all/20240503060553.8520-3-harini.t@amd.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Oliver Hartkopp authored
With the new ISO 15765-2:2024 release the former documentation and comments have to be reworked. This patch removes the ISO specification version/date where possible. Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net> Acked-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Acked-by: Francesco Valla <valla.francesco@gmail.com> Link: https://lore.kernel.org/all/20240420194746.4885-1-socketcan@hartkopp.netSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Harini T authored
Xilinx CAN binding documentation supports CAN and CANFD controllers. Modify the title to indicate that both controllers are supported. Signed-off-by: Harini T <harini.t@amd.com> Link: https://lore.kernel.org/all/20240503060553.8520-2-harini.t@amd.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Mans Rullgard authored
Commit cfcb4465 ("can: slcan: remove legacy infrastructure") removed the 10-device limit. Update the Kconfig help text accordingly. Signed-off-by: Mans Rullgard <mans@mansr.com> Acked-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Link: https://lore.kernel.org/all/20240427152648.25434-1-mans@mansr.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Andy Shevchenko authored
There is predefined PCI_SUBVENDOR_ID_CONNECT_TECH, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/all/20240502123852.2631577-1-andriy.shevchenko@linux.intel.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Andy Shevchenko authored
This driver is including the legacy GPIO header <linux/gpio.h> but the only thing it is using from that header is the wrong define for GPIOF_DIR_OUT. Fix it up by using GPIO_LINE_DIRECTION_* macros respectively. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr> Link: https://lore.kernel.org/all/20240412173332.186685-1-andriy.shevchenko@linux.intel.comSigned-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Jakub Kicinski authored
Shannon Nelson says: ==================== ionic: rework fix for doorbell miss A latency test in a scaled out setting (many VMs with many queues) has uncovered an issue with our missed doorbell fix from commit b69585bf ("ionic: missed doorbell workaround") As a refresher, the Elba ASIC has an issue where once in a blue moon it might miss/drop a queue doorbell notification from the driver. This can result in Tx timeouts and potential Rx buffer misses. The basic problem with the original solution is that we're delaying things with a timer for every single queue, periodically using mod_timer() to reset to reset the alarm, and mod_timer() becomes a more and more expensive thing as there are more and more VFs and queues each with their own timer. A ping-pong latency test tends to exacerbate the effect such that every napi is doing a mod_timer() in every cycle. An alternative has been worked out to replace this using periodic workqueue items outside the napi cycle to request a napi_schedule driven by a single delayed-workqueue per device rather than a timer for every queue. Also, now that newer firmware is actually reporting its ASIC type, we can restrict this to the appropriate chip. The testing scenario used 128 VFs in UP state, 16 queues per VF, and latency tests were done using TCP_RR with adaptive interrupt coalescing enabled, running on 1 VF. We would see 99th percentile latencies of up to 900us range, with some max fliers as much as 4ms. With these fixes the 99th percentile latencies are typically well under 50us with the occasional max under 500us. v1: https://lore.kernel.org/netdev/20240610230706.34883-1-shannon.nelson@amd.com/ ==================== Link: https://lore.kernel.org/r/20240619003257.6138-1-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Brett Creeley authored
If the doorbell workaround isn't required for a certain asic_type then there is no need to run the associated code. Since newer FW versions are finally reporting their asic_type we can use a flag to determine whether or not to do the workaround. Signed-off-by: Brett Creeley <brett.creeley@amd.com> Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-9-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Brett Creeley authored
We only support (u16)-1 size for rx_copybreak, so we can reduce the field size and move a couple other fields around to save a little space in the ionic_lif struct. Before: /* size: 17440, cachelines: 273, members: 56 */ /* sum members: 17403, holes: 9, sum holes: 37 */ /* last cacheline: 32 bytes */ After: /* size: 17424, cachelines: 273, members: 56 */ /* sum members: 17401, holes: 7, sum holes: 23 */ /* last cacheline: 16 bytes */ Signed-off-by: Brett Creeley <brett.creeley@amd.com> Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-8-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Shannon Nelson authored
Check the deadline against the last time run and only schedule a new napi if we haven't been run recently. Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-7-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Shannon Nelson authored
Add a work item for each queue that will be run on the queue's preferred cpu and will schedule another napi. This napi is run in case the device missed a doorbell and didn't process a packet. This is a problem for the Elba asic that happens very rarely. Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-6-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Shannon Nelson authored
Add the first queued work for checking on the missed doorbell. This is a delayed work item that reschedules itself every cycle starting at probe. Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-5-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Shannon Nelson authored
Instead of using the system's default workqueue, add a private workqueue for the device to use for its little jobs. This is to better support the new work items we will be adding in the next patches for PF and VF specific jobs, without inundating the system workqueue in a couple of customer cases where our devices get scaled out to 100-200 VFs. Signed-off-by: Brett Creeley <brett.creeley@amd.com> Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-4-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Brett Creeley authored
Currently the driver either sets the initial interrupt affinity for its adminq and tx/rx queues on probe or resets it on various down/up/reconfigure flows. If any user and/or user process (i.e. irqbalance) changes IRQ affinity for any of the driver's interrupts that will be reset to driver defaults whenever any down/up/reconfigure operation happens. This is incorrect and is fixed by making 2 changes: 1. Allocate an array of cpumasks that's only allocated on probe and destroyed on remove. 2. Update the cpumask(s) for interrupts that are in use by registering for affinity notifiers. Signed-off-by: Brett Creeley <brett.creeley@amd.com> Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-3-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Shannon Nelson authored
Remove the timer-per-queue mechanics from the missed doorbell check in preparation for the new missed doorbell fix. Signed-off-by: Shannon Nelson <shannon.nelson@amd.com> Link: https://lore.kernel.org/r/20240619003257.6138-2-shannon.nelson@amd.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Jakub Kicinski authored
Petr Machata says: ==================== mlxsw: Use page pool for Rx buffers allocation Amit Cohen writes: After using NAPI to process events from hardware, the next step is to use page pool for Rx buffers allocation, which is also enhances performance. To simplify this change, first use page pool to allocate one continuous buffer for each packet, later memory consumption can be improved by using fragmented buffers. This set significantly enhances mlxsw driver performance, CPU can handle about 370% of the packets per second it previously handled. The next planned improvement is using XDP to optimize telemetry. Patch set overview: Patches #1-#2 are small preparations for page pool usage Patch #3 initializes page pool, but do not use it Patch #4 converts the driver to use page pool for buffers allocations Patch #5 is an optimization for buffer access Patch #6 cleans up an unused structure Patch #7 uses napi_consume_skb() as part of Tx completion ==================== Link: https://lore.kernel.org/r/cover.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
Currently, as part of Tx completion, the driver calls dev_kfree_skb_any() to free the SKB. For this flow, the correct function is napi_consume_skb(). This function and dev_consume_skb_any() were added to be used for consumed SKBs, which were not dropped, so the skb:kfree_skb tracepoint is not triggered, and we can get better diagnostics about dropped packets. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/a9f9f3dc884c0d1be4bd4c9d72030c88c7ac004f.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
The previous patch used page pool to allocate buffers for RDQ. With this change, 'elem_info->u.rdq.skb' is not used anymore, as we do not allocate SKB before getting the packet, we hold page pointer and build the SKB around it once packet is received. Remove the union and store SKB pointer for SDQ only. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/23a531008936dc9a1a298643fb1e4f9a7b8e6eb3.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
Before accessing data buffer, call net_prefetch() to load it into the cache. This change improves driver performance, CPU can handle about 7.1% more packets per second. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/1fa07c510890866a6f201163ab7e78890ba28b3b.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
As part of driver init, all Rx queues are filled with buffers for hardware usage. Later, when a packet is received, a new buffer should be allocated to be used by hardware instead of the received buffer. Packet's processing time includes allocation time, which can be improved using page pool. Using page pool, DMA mapping is done only for first allocation of buffers. As subsequent buffers allocation avoid DMA mapping, it results in performance improvement. The purpose of page pool is to allocate pages fast from cache without locking. This lockless guarantee naturally comes from running under a NAPI. Use page pool to allocate the data buffer only, so hardware will use it to fill the packet. At completion time, attach the data buffer (now filled with packet payload) to new SKB which is allocated around the received buffer. SKB building at completion time prevents cache miss for each packet, as now the SKB is allocated right before packets will be handled by networking stack. Page pool for each Rx queue enhances Rx side performance by reclaiming buffers back to each queue specific pool. This change significantly improves driver performance, CPU can handle about 345% of the packets per second it previously handled. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/1cf788a8f43c70aae6d526018ef77becb27ad6d3.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
Next patch will use page pool to allocate buffers for RDQ. Initialize page pool for each CQ, which is mapped 1:1 to RDQ. Page pool for each Rx queue enhances Rx side performance by reclaiming buffers back to each queue specific pool. When only one NAPI instance is the consumer of pages from page pool, it is recommended to pass it as part of 'page_pool_params', then page pool APIs will be done without special locks. mlxsw driver holds NAPI instance per CQ, so add page pool per CQ and use the existing NAPI instance. For now, pages are not allocated from the pool, next patch will use it. Some notes regarding 'page_pool_params': * Use PP_FLAG_DMA_MAP to allow page pool handles DMA mapping, for now do not use sync flag, as only the device writes to this memory and we read it only when it finishes writing there. This will probably be changed when we will support XDP. * Define 'order' according to maximum MTU and take into account software overhead. Some round up are done, which means that we allocate more pages than we really need. This can be improved later by using fragmented buffers. * Use pool_size = MLXSW_PCI_WQE_COUNT. This will be the size of 'ptr_ring', and should be the maximum amount of packets that page pool will allocate memory for. In our case, this is the queue size, defined as MLXSW_PCI_WQE_COUNT. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/02e5856ae7c572d4293ce6bb92c286ee6cfec800.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
Next patches will add support for page pool in mlxsw driver. Page pool will be used to allocate buffers for RDQ and will use NAPI instance of the appropriate CQ (RDQ is mapped 1:1 to CQ). To allow pool initialization as part of CQ init, when NAPI is initialized, page_pool structure will be as part of CQ structure. Later, the allocations for RDQ will be done from the pool in the appropriate CQ. To allow access to the appropriate pool, set CQ pointer as part of RDQ initialization. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/d60918ca1e142a554af1df9c1152cdac83854a3b.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Amit Cohen authored
mlxsw_pci_cq_napi_setup() includes both NAPI initialization and enablement, similar to teardown function. Next patches will add support for page pool in mlxsw driver, then we use NAPI instance for page pool. Page pool initialization should be done before NAPI enablement, same for page pool destruction which should be done after NAPI disablement. As preparation, split NAPI setup/teardown into two steps, then page pool setup will be done between the phases. Signed-off-by: Amit Cohen <amcohen@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Petr Machata <petrm@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/8dbf37e859f07247498fca17109b8858ff2b0498.1718709196.git.petrm@nvidia.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Lukasz Majewski authored
This change just removes extra (i.e. not needed) white space in prp_drop_frame() function. No functional changes. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Hangbin Liu <liuhangbin@gmail.com> Link: https://lore.kernel.org/r/20240618125817.1111070-1-lukma@denx.deSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Jiri Pirko authored
Add support for Byte Queue Limits (BQL). Tested on qemu emulated virtio_net device with 1, 2 and 4 queues. Tested with fq_codel and pfifo_fast. Super netperf with 50 threads is running in background. Netperf TCP_RR results: NOBQL FQC 1q: 159.56 159.33 158.50 154.31 agv: 157.925 NOBQL FQC 2q: 184.64 184.96 174.73 174.15 agv: 179.62 NOBQL FQC 4q: 994.46 441.96 416.50 499.56 agv: 588.12 NOBQL PFF 1q: 148.68 148.92 145.95 149.48 agv: 148.2575 NOBQL PFF 2q: 171.86 171.20 170.42 169.42 agv: 170.725 NOBQL PFF 4q: 1505.23 1137.23 2488.70 3507.99 agv: 2159.7875 BQL FQC 1q: 1332.80 1297.97 1351.41 1147.57 agv: 1282.4375 BQL FQC 2q: 768.30 817.72 864.43 974.40 agv: 856.2125 BQL FQC 4q: 945.66 942.68 878.51 822.82 agv: 897.4175 BQL PFF 1q: 149.69 151.49 149.40 147.47 agv: 149.5125 BQL PFF 2q: 2059.32 798.74 1844.12 381.80 agv: 1270.995 BQL PFF 4q: 1871.98 4420.02 4916.59 13268.16 agv: 6119.1875 Signed-off-by: Jiri Pirko <jiri@nvidia.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Link: https://lore.kernel.org/r/20240618144456.1688998-1-jiri@resnulli.usSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Jeff Johnson authored
With ARCH=m68k, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/smsc/smc9194.o Add the missing invocation of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20240618-md-m68k-drivers-net-ethernet-smsc-v1-1-ad3d7200421e@quicinc.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Jeff Johnson authored
With ARCH=m68k, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/cirrus/mac89x0.o Add the missing invocation of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20240618-md-m68k-drivers-net-ethernet-cirrus-v1-1-07f5bd0b64cb@quicinc.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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Jeff Johnson authored
With ARCH=m68k, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/a2065.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/ariadne.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/atarilance.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/hplance.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/7990.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/mvme147.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/net/ethernet/amd/sun3lance.o Add the missing invocation of the MODULE_DESCRIPTION() macro to all files which have a MODULE_LICENSE(). This includes drivers/net/ethernet/amd/lance.c which, although it did not produce a warning with the m68k allmodconfig configuration, may cause this warning with other configurations. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20240618-md-m68k-drivers-net-ethernet-amd-v1-1-50ee7a9ad50e@quicinc.comSigned-off-by: Jakub Kicinski <kuba@kernel.org>
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