- 20 Nov, 2014 1 commit
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Arnd Bergmann authored
Dependency for the gpmc changes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 12 Nov, 2014 13 commits
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Nishanth Menon authored
Add serial port aliases for consoles > 6. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
BeagleBoard-X15 is the next generation Open Source Hardware BeagleBoard based on TI's AM5728 SoC featuring dual core 1.5GHz A15 processor. The platform features 2GB DDR3L (w/dual 32bit busses), eSATA, 3 USB3.0 ports, integrated HDMI (1920x1080@60), separate LCD port, video In port, 4GB eMMC, uSD, Analog audio in/out, dual 1G Ethernet. For more information, refer to: BeagleBoard-X15 Wiki: http://www.elinux.org/Beagleboard:BeagleBoard-X15 AM5728 is part of the Sitara product family whose additional details will be available: http://www.ti.com/lsds/ti/arm/overview.page Technical Reference Manual for AM5728 is public domain at: http://www.ti.com/lit/spruhz6 Just add basic support for the moment, the following updates are needed: i) Ethernet - depends on SoC dts fixes ii) USB Client (USB2) - depends on GPIO extcon ii) HDMI - additional driver fixes pending iii) Audio - additional driver fixes pending NOTE: AM5728 Data Manual (SPRS915L - August 2014) section 4.1.1 states: "All unused power supply balls must be supplied with the voltages specified in the Section 5.2, Recommended Operating Conditions". This implies that all unused voltage rails for AM5728 can never be switched off even if the hardware blocks inside that voltage domain is unused. Switching off these unused rails may result in stability issues on other domains and increased leakage and power-on-hour impacts. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
Add btwilink device for IGEPv2 Rev. F and IGEP COM MODULE Rev. G. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
We can't suppose that the i2c2 pins are configured as I2C bus, these pins are connected to expansion connectors. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
Add support for the new hardware revision of the IGEPv2. Basically, the new revision F replaces the old Wifi module for a Wilink8 based module. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
Use the omap3-igep0020-common.dtsi file and remove repeated parts leaving the nodes that are not common between IGEPv2 hardware revisions. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
Add support for the new hardware revision of the IGEP COM MODULE. Basically, the new revision G replaces the old Wifi module for a Wilink8 based module. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
Use the omap3-igep0030-common.dtsi file and remove repeated parts leaving the nodes that are not common between IGEP COM MODULE hardware revisions. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
New IGEP boards revisions will use another Wifi module, so this patch moves the DT nodes outside the common omap3-igep.dtsi file to specific DT for every board. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
We'll introduce new hardware revisions soon. This patch is only to indicate which board revision supports this device tree file in order to avoid confusions. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
We'll introduce new hardware revisions soon. This patch is only to indicate which board revision supports this device tree file in order to avoid confusions. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
At this moment all supported boards use same NAND chip, so has more sense move the GPMC and NAND configuration to the omap3-igep.dtsi common place. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enric Balletbo i Serra authored
UART2 is used to connect the processor with the bluetooth chip, these pins are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch muxes the correct pins for every board and removes UART2 configuration from common omap3-igep.dtsi file. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 10 Nov, 2014 18 commits
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Felipe Balbi authored
by adding labels to DWC3 nodes, it's far easier for boards to reference them. Signed-off-by: Felipe Balbi <balbi@ti.com> [tony@atomide.com: updated for otg 4 move to dra74x.dtsi] Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mugunthan V N authored
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and sleep states and enable them in board evm dts file. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
DRA7 Data Manual (SPRS857L - August 2014) section 4.1.1 states: "All unused power supply balls must be supplied with the voltages specified in the Section 5.2, Recommended Operating Conditions". This implies that all unused voltage rails for Vayu can never be switched off even if the hardware blocks inside that voltage domain is unused. Switching off these unused rails may result in stability issues on other domains and increased leakage and power-on-hour impacts. J6eco-evm dts file already considers this, however j6evm-dts file needs to be fixed to consider this constraint of the SoC. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
Add MMC1 and 2 nodes. MMC1 is SDcard and MMC2 is eMMC. NOTE on MMC1 card detect: Ideally, we should be using in-built SDCD support, but we dont have it yet. So, use the fact that control module of DRA7 is setup such that no matter what mode one configures it, GPIO option is always hardwired in - use GPIO mode for SDcard detection. [peter.ujfalusi@ti.com] The power line feeding the SD card is also used by other devices on the EVM. Use generic name instead of mmc2_3v3 so when other devices want to use the same regulator it will look a bit better. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
With Commit adff5962 ("Input: introduce palmas-pwrbutton"), we can now support tps power button as a event source - This is SW7 (PB/WAKE) on the J6-evm. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
Even thought sys_nirq1 is hardwired on the SoC for the pin, it is better to configure the pin to the required mux configuration. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
The ldo4_reg regulator provides power to the USB1 and USB2 High Speed PHYs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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George Cherian authored
Add USB data and pinctrl for USB. Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
The 4th USB controller instance present only on the DRA74x family of devices so move it there. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
DRA72-evm has a 256MB 16-bit wide NAND chip. Add pinmux and NAND node. The NAND chips 'Chip select' and 'Write protect' can be controlled using DIP Switch SW5. To use NAND, the switch must be configured like so: SW5.1 (NAND_SELn) = ON (LOW) SW5.9 (GPMC_WPN) = OFF (HIGH) Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mugunthan V N authored
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and sleep states and enable them in board evm dts file. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mugunthan V N authored
Add CPSW and MDIO related device tree data for DRA7XX and made as status disabled. Phy-id, pinmux for active and sleep state needs to be added in board dts files and enable the CPSW device. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Marek Belisko authored
Use omap specific pinctrl defines (OMAP3_CORE1_IOPAD) to configure the padconf register offset. Signed-off-by: Marek Belisko <marek@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Dmitry Lifshitz authored
Add DSS related pinmux and display data nodes required to support DVI video out on SBC-T3530, SBC-T3730 and SBC-T3517. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Sebastian Andrzej Siewior authored
Cc: devicetree@vger.kernel.org Reviewed-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Sebastian Andrzej Siewior authored
Cc: devicetree@vger.kernel.org Reviewed-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
The '#mbox-cells' property is added to all the OMAP mailbox nodes. This property is mandatory with the new mailbox framework. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
Add the interrupts property to all the 13 mailbox nodes in DRA7xx. The interrupts property information added is inline with the expected values with the DRA7xx crossbar driver, and is common to both DRA74x and DRA72x SoCs. Do note that the mailbox 1 is only capable of generating out 3 interrupts, while all the remaining mailboxes have 4 interrupts each. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 04 Nov, 2014 2 commits
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Tony Lindgren authored
Looks like we have some GPMC NAND timings missing device width. This fixes "gpmc_cs_program_settings: invalid width 0!" errors during boot. Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
With the GPMC warnings now enabled, I noticed the LAN9220 timings can overflow the GPMC registers with 200MHz L3 speed. Earlier we were just skipping the bad timings and would continue with the bootloader timings. Now we no longer allow to continue with bad timings as we have the timings in the .dts files. We could start using the GPMC clock divider, but let's instead use the u-boot timings that are known to be working and a bit faster. These are basically the u-boot NET_GPMC_CONFIG[1-6] defines deciphered. Except that we don't set gpmc,burst-length as that's only partially configured and does not seem to work if fully enabled. [tony@atomide.com: updated to remove gpmc,burst-length] Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 02 Nov, 2014 6 commits
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Linus Torvalds authored
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git://git.infradead.org/linux-mtdLinus Torvalds authored
Pull MTD fixes from Brian Norris: "Three main MTD fixes for 3.18: - A regression from 3.16 which was noticed in 3.17. With the restructuring of the m25p80.c driver and the SPI NOR library framework, we omitted proper listing of the SPI device IDs. This means m25p80.c wouldn't auto-load (modprobe) properly when built as a module. For now, we duplicate the device IDs into both modules. - The OMAP / ELM modules were depending on an implicit link ordering. Use deferred probing so that the new link order (in 3.18-rc) can still allow for successful probing. - Fix suspend/resume support for LH28F640BF NOR flash" * tag 'for-linus-20141102' of git://git.infradead.org/linux-mtd: mtd: cfi_cmdset_0001.c: fix resume for LH28F640BF chips mtd: omap: fix mtd devices not showing up mtd: m25p80,spi-nor: Fix module aliases for m25p80 mtd: spi-nor: make spi_nor_scan() take a chip type name, not spi_device_id mtd: m25p80: get rid of spi_get_device_id
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "This is a set of six patches consisting of: - two MAINTAINER updates - two scsi-mq fixs for the old parallel interface (not every request is tagged and we need to set the right flags to populate the SPI tag message) - a fix for a memory leak in scatterlist traversal caused by a preallocation update in 3.17 - an ipv6 fix for cxgbi" [ The scatterlist fix also came in separately through the block layer tree ] * tag 'scsi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: MAINTAINERS: ufs - remove self MAINTAINERS: change hpsa and cciss maintainer libcxgbi : support ipv6 address host_param scsi: set REQ_QUEUE for the blk-mq case Revert "block: all blk-mq requests are tagged" lib/scatterlist: fix memory leak with scsi-mq
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fixes from Dave Airlie: "Nothing too astounding or major: radeon, i915, vmwgfx, armada and exynos. Biggest ones: - vmwgfx has one big locking regression fix - i915 has come displayport fixes - radeon has some stability and a memory alloc failure - armada and exynos have some vblank fixes" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (24 commits) drm/exynos: correct connector->dpms field before resuming drm/exynos: enable vblank after DPMS on drm/exynos: init kms poll at the end of initialization drm/exynos: propagate plane initialization errors drm/exynos: vidi: fix build warning drm/exynos: remove explicit encoder/connector de-initialization drm/exynos: init vblank with real number of crtcs drm/vmwgfx: Filter out modes those cannot be supported by the current VRAM size. drm/vmwgfx: Fix hash key computation drm/vmwgfx: fix lock breakage drm/i915/dp: only use training pattern 3 on platforms that support it drm/radeon: remove some buggy dead code drm/i915: Ignore VBT backlight check on Macbook 2, 1 drm/radeon: remove invalid pci id drm/radeon: dpm fixes for asrock systems radeon: clean up coding style differences in radeon_get_bios() drm/radeon: Use drm_malloc_ab instead of kmalloc_array drm/radeon/dpm: disable ulv support on SI drm/i915: Fix GMBUSFREQ on vlv/chv drm/i915: Ignore long hpds on eDP ports ...
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git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds authored
Pull ARM fixes from Russell King: - add the new bpf syscall to ARM. - drop a redundant return statement in __iommu_alloc_remap() - fix a performance issue noticed by Thomas Petazzoni with kmap_atomic(). - fix an issue with the L2 cache OF parsing code which caused it to incorrectly print warnings on each boot, and make the warning text more consistent with the rest of the code * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8180/1: mm: implement no-highmem fast path in kmap_atomic_pfn() ARM: 8183/1: l2c: Improve l2c310_of_parse() error message ARM: 8181/1: Drop extra return statement ARM: 8182/1: l2c: Make l2x0_cache_size_of_parse() return 'int' ARM: enable bpf syscall
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git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds authored
Pull kvm fixes from Paolo Bonzini: "A small set of x86 fixes. The most serious is an SRCU lockdep fix. A bit late - needed some time to test the SRCU fix, which only came in on Friday" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: vmx: defer load of APIC access page address during reset KVM: nVMX: Disable preemption while reading from shadow VMCS KVM: x86: Fix far-jump to non-canonical check KVM: emulator: fix execution close to the segment limit KVM: emulator: fix error code for __linearize
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