Merge tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers

Pull "ARM: mediatek: updates for soc drivers for v4.16-next" from Matthias Brugger:

scpsy:
- mt2712: update power domains to reflect design changes in the SoC
- fix initialisation of power subdomains
- add support for mt7623a SoC
- use defines for mt2701 bus protection mask

* tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: update power domain data of MT2712
  dt-bindings: soc: update MT2712 power dt-bindings
  soc: mediatek: fix the mistaken pointer accessed when subdomains are added
  soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
  soc: mediatek: avoid hardcoded value with bus_prot_mask
  dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
  dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC

Merge tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "soc/tegra: Changes for v4.17-rc1" from Thierry Reding:

This contains more Tegra194 support as well as an implementation for the
MBIST workaround needed to avoid some memory-related issues on Tegra210.

* tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Use the new reset APIs to manage reset controllers
  soc/tegra: pmc: Pass PMC to tegra_powergate_power_up()
  soc/tegra: pmc: MBIST work around for Tegra210
  soc/tegra: pmc: Add Tegra194 compatibility string
  soc/tegra: Add Tegra194 SoC configuration option

Merge tag 'tegra-for-4.17-firmware' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "firmware: Changes for v4.17-rc1" from Thierry Reding:

These changes are rather small, with just a fix for a return value check
and some preparatory work for Tegra194 BPMP support.

* tag 'tegra-for-4.17-firmware' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: adjust tested variable
  firmware: tegra: Simplify channel management

Make use of of_reset_control_array_get_exclusive() to manage
an array of reset controllers available with the device.

Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
[p.zabel@pengutronix.de: switch to hidden reset control array]
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

1. split MFG power domain into MFG/MFG_SC1/MFG_SC2/MFG_SC3
according to MT2712 ECO design change
2. add subdomain support for MT2712
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add new power domains(MFG_SC1/MFG_SC2/MFG_SC3)
for MT2712 according to ECO design change.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Merge tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

Pull "i.MX drivers update for 4.17" from Shawn Guo:

 - Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
   power state in sysfs pm_genpd_summary output.

* tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: ARM power domain should be always-on

A built-in scmi cpufreq driver cannot link against a modular
thermal framework:

drivers/cpufreq/scmi-cpufreq.o: In function `scmi_cpufreq_ready':
scmi-cpufreq.c:(.text+0x40): undefined reference to `of_cpufreq_cooling_register'
drivers/cpufreq/scmi-cpufreq.o: In function `scmi_cpufreq_exit':
scmi-cpufreq.c:(.text+0x88): undefined reference to `cpufreq_cooling_unregister'

This adds a Kconfig dependency that makes sure this configuration
is not possible, while allowing all configurations that can work.
Note that disabling CPU_THERMAL means we don't care about the
THERMAL dependency.
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Fix the pointer to struct scp_subdomian not being moved forward
when each sub-domain is expected to be iteratively added through
pm_genpd_add_subdomain call.

Cc: stable@vger.kernel.org
Fixes: 53fddb1a ("soc: mediatek: reduce code duplication of scpsys_probe across all SoCs")
Reported-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add SCPSYS power domain driver for MT7623A SoC. The MT7623A's power
domains are the subset of MT7623 SoC's ones. As MT7623 SoC has full
features whereas MT7623A is being designed just for router applications.
Thus, MT7623A doesn't include those power domains multimedia function
belongs to. In order to avoid certain errors undoubtedly happening at
registering those power domains on MT7623A SoC using the existing MT7623
SCPSYS driver, it's required to define another setup specifically for
MT7623A SoC.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

use a meaningful definition for bus_prot_mask instead of just hardcoded
for it.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add relevant header files required for dt-bindings of SCPSYS power domain
control for subsystems found on MT7623A SoC.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[mb: clean-up commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

document the binding for enabling SCPSYS on MediaTek MT7623 and MT7623A
SoC. Where MT7623 SoC has the same definition about power domains with
MT2701, so it's fine to using MT2701 ones as MT7623's fallback.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

tegra_powergate_sequence_power_up() makes up a struct tegra_powergate
from scratch in order to reuse the same code as used by the generic PM
domain implementation. However, subsequent patches will need to access
the struct tegra_pmc * embedded in the powergate structure, so we need
to make sure we always pass it in.
Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Apply the memory built-in self test work around when ungating certain
Tegra210 power domains.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Tegra194 PMC is mostly compatible with Tegra186, including in all
currently supported features. As such, add a new compatibility string
but point to the existing Tegra186 SoC data for now.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the configuration option to enable support for the Tegra194 system-
on-chip.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Check the variable that was most recently initialized.

The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression x, y, f, g, e, m;
statement S1,S2,S3,S4;
@@

x = f(...);
if (\(<+...x...+>\&e\)) S1 else S2
(
x = g(...);
|
m = g(...,&x,...);
|
y = g(...);
*if (e)
 S3 else S4
)
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Tegra194 BPMP only implements 5 channels (4 to BPMP, 1 to CCPLEX),
and they are not placed contiguously in memory. The current channel
management in the BPMP driver does not support this.

Simplify and refactor the channel management such that only one atomic
transmit channel and one receive channel are supported, and channels
are not required to be placed contiguously in memory. The same
configuration also works on T186 so we end up with less code.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Merge tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Pull "Samsung soc drivers changes for v4.17" from Krzysztof Kozłowski:

1. Add SPDX license identifiers.
2. Populate children syscon nodes in PMU driver to properly model HW in
   DeviceTree.

* tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: pmu: Populate children syscon nodes
  soc: samsung: Add SPDX license identifiers to headers
  memory: samsung: Add SPDX license identifiers

Merge tag 'tee-drv-misc-for-v4.17' of https://git.linaro.org:/people/jens.wiklander/linux-tee into next/drivers

Pull "Small fix and report OP-TEE revision information" from Jens Wiklander:

* Adds one small fix correct max value of privileged device id allocation,
  this is only needed if there's more than TEE_NUM_DEVICES / 2 (16) tee
  drivers registered. One or two is a normal value.
* Reports OP-TEE revision information (major, minro version and build id
  if available)

* tag 'tee-drv-misc-for-v4.17' of https://git.linaro.org:/people/jens.wiklander/linux-tee:
  tee: optee: report OP-TEE revision information
  tee: optee: GET_OS_REVISION: document a2 as a build identifier
  tee: correct max value for id allocation

Merge tag 'soc_drivers_for_4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers

Pull "SOC driver changes for v4.17" from Santosh Shilimkar:

 - Remove redundant dev_err from probe in ti-emif-srma driver
 - Make use of seq_putc in emif reg show

* tag 'soc_drivers_for_4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  memory: ti-emif-sram: remove redundant dev_err call in ti_emif_probe()
  memory-EMIF: Use seq_putc() in emif_regdump_show()

Merge tag 'scmi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers

Pull "ARM SCMI support for v4.17" from Sudeep Holla:

ARM System Control and Management Interface(SCMI)[1] is more flexible and
easily extensible than any of the existing interfaces.

Few existing as well as future ARM platforms provide micro-controllers
to abstract various power and other system management tasks which have
similar interfaces, both in terms of the functions that are provided by
them, and in terms of how requests are communicated to them.

There are quite a few protocols like ARM SCPI, TI SCI, QCOM RPM, Nvidia Tegra
BPMP, and so on already. This specification is to standardize and avoid any
further fragmentation in the design of such interface by various vendors.

The current SCMI driver implementation is very basic and initial support.
It lacks support for notifications, asynchronous/delayed response, perf/power
statistics region and sensor register region.

Mailbox is the only form of transport supported currently in the driver.
SCMI supports interrupt based mailbox communication, where, on completion
of the processing of a message, the caller receives an interrupt as well as
polling for completion.

SCMI is designed to minimize the dependency on the mailbox/transport
hardware. So in terms of SCMI, each channel in the mailbox includes
memory area, doorbell and completion interrupt.

However the doorbell and completion interrupt is highly mailbox dependent
which was bit of controversial as part of SCMI/mailbox discussions.

Arnd and me discussed about the few aspects of SCMI and the mailbox framework:

1. Use of mailbox framework for doorbell type mailbox controller:
   - Such hardware may not require any data to be sent to signal the remote
     about the presence of a message. The channel will have in-built
     information on how to trigger the signal to the remote.
     There are few mailbox controller drivers which are purely doorbell based.
     e.g.QCOM IPC, STM, Tegra, ACPI PCC,..etc

2. Supporting other mailbox controller:
   - SCMI just needs a mechanism to signal the remote firmware. Such
     controller may need fixed message to be sent to trigger a doorbell.
     In such case we may need to get that data from DT and pass the same
     to the controller. It's not covered in the current DT binding, but
     can be extended as optional property in future.

     However handling notifications may be interesting on such mailbox, but
     again there is no way to interpret what the data field(remote message)
     means, it could be a bit mask or a number or don't-care.

Arnd mentioned that he doesn't like the way the mailbox binding deals
with doorbell-type hardware, but we do have quite a few precedent drivers
already and changing the binding to add a data field would not make it any
better, but could cause other problems. So he is happy with the status quo
of SCMI implementation.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0056a/index.html

* tag 'scmi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  cpufreq: scmi: add support for fast frequency switching
  cpufreq: add support for CPU DVFS based on SCMI message protocol
  hwmon: add support for sensors exported via ARM SCMI
  hwmon: (core) Add hwmon_max to hwmon_sensor_types enumeration
  clk: add support for clocks provided by SCMI
  firmware: arm_scmi: add device power domain support using genpd
  firmware: arm_scmi: add per-protocol channels support using idr objects
  firmware: arm_scmi: refactor in preparation to support per-protocol channels
  firmware: arm_scmi: add option for polling based performance domain operations
  firmware: arm_scmi: add support for polling based SCMI transfers
  firmware: arm_scmi: probe and initialise all the supported protocols
  firmware: arm_scmi: add initial support for sensor protocol
  firmware: arm_scmi: add initial support for power protocol
  firmware: arm_scmi: add initial support for clock protocol
  firmware: arm_scmi: add initial support for performance protocol
  firmware: arm_scmi: add scmi protocol bus to enumerate protocol devices
  firmware: arm_scmi: add common infrastructure and support for base protocol
  firmware: arm_scmi: add basic driver infrastructure for SCMI
  dt-bindings: arm: add support for ARM System Control and Management Interface(SCMI) protocol
  dt-bindings: mailbox: add support for mailbox client shared memory

Merge tag 'scpi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers

Pull "ARM SCPI updates/cleanups for v4.17" from Sudeep Holla:

1. Fixes to get rid of sparse warnings
2. Use of FIELD_GET and GENMASK for better subfields handling
3. Make mbox_free_channels device-managed helping in removing unnecessary code
4. Various other cleanups to simplify and improve code readability

Note that similar set of changes were merged in v4.15, however got reverted
through the commit 81faa556 ("firmware: arm_scpi: Revert updates made
during v4.15 merge window") for reasons mentioned in that commit.

This is the resend with the culprit patch removed. Kevin Hilman tested this
series on Amlogic and reported it to be fine.

* tag 'scpi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: arm_scpi: improve info message for pre-1.0 firmware
  firmware: arm_scpi: use FIELD_GET/_PREP to simplify macro definitions
  firmware: arm_scpi: remove struct sensor_capabilities
  firmware: arm_scpi: fix incorrect __iomem accesses using correct accessors
  firmware: arm_scpi: remove all single element structures
  firmware: arm_scpi: drop unnecessary type cast to scpi_shared_mem
  firmware: arm_scpi: improve struct sensor_value
  firmware: arm_scpi: improve handling of protocol and firmware version subfields
  firmware: arm_scpi: improve struct dvfs_info to make code better readable
  firmware: arm_scpi: make scpi_probe completely device-managed
  firmware: arm_scpi: make freeing mbox channels device-managed
  firmware: arm_scpi: remove two unneeded devm_kfree's in scpi_remove

Pull "Reset controller changes for v4.17" from Philipp Zabel:

This enables level resets on Meson8b SoCs. Level resets have been
previously implemented for the newer Meson GX SoCs, so this removes
the distinction between the two families in the meson-reset driver.

Also enables the ASPEED LPC reset controller on ASPEED AST2400 and
AST2500 SoCs, by adding compatibles to the simple-reset driver.

* tag 'reset-for-4.17' of git://git.pengutronix.de/git/pza/linux:
  reset: simple: Enable for ASPEED systems
  dt-bindings: aspeed-lpc: Add reset controller
  reset: meson: enable level reset support on Meson8b

Depending directly on the bus driver's global cci_ctrl_base variable
is a little unpleasant, and exporting it to allow the PMU driver to
be modular would be even more so. Let's make things a little better
abstracted by adding the control register block to the cci_pmu instance
data alongside the PMU register block, and communicating the mapped
address from the bus driver via platform data.

It's not practical to try the same thing for the bus driver itself,
given that the globals are entangled with the hairy assembly code for
port control, so we leave them be there. It would however be prudent
to move them to the __ro_after_init section in passing, since the
addresses really should never be changing once set.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Since I am the self-appointed of_device_get_match_data() police, it's
only right that I should clean up this driver while I'm otherwise
touching it. This also reveals that we're passing around a struct
platform_device in places where we only ever care about its regular
device, so straighten that out in the process.
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Rather than iterating over child nodes explicitly testing for
availability, we can just use the other helper which already subsumes
that check. Also, the availability check is already NULL-safe, so get
rid of a redundant check in cci_probe(), too.
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Realistically, systems with multiple CCIs are unlikely to ever exist,
and since the driver only actually supports a single instance anyway
there's really no need to do the multi-instance hotplug state dance.

Take the opportunity to simplify the hotplug-related code all over,
addressing the context-migration TODO in the process for good measure.
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The arm-cci driver is really two entirely separate drivers; one for MCPM
port control and the other for the performance monitors. Since they are
already relatively self-contained, let's take the plunge and move the
PMU parts out to drivers/perf where they belong these days. For non-MCPM
systems this leaves a small dependency on the remaining "bus" stub for
initial probing and discovery, but we end up with something that still
fits the general pattern of its fellow system PMU drivers to ease future
maintenance.

Moving code to a new file also offers a perfect excuse to modernise the
license/copyright headers and clean up some funky linewraps on the way.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Acked-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The arm-ccn driver is purely a perf driver for the CCN PMU, not a bus
driver in the sense of the other residents of drivers/bus/, so let's
move it to the appropriate place for SoC PMU drivers. Not to mention
moving the documentation accordingly as well.
Acked-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

When the driver initializes, report the following information
about the OP-TEE OS:
- major and minor version,
- build identifier (if available).
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Matthias Brugger <mbruger@suse.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

In the OPTEE_SMC_CALL_GET_OS_REVISION request, the previously reserved
parameter a2 is now documented as being an optional build identifier
(such as an SCM revision or commit ID, for instance).

A new structure optee_smc_call_get_os_revision_result is introduced to
be used when querying the secure OS version, instead of re-using the
struct defined for OPTEE_SMC_CALLS_REVISION.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Matthias Brugger <mbruger@suse.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

The privileged dev id range is [TEE_NUM_DEVICES / 2, TEE_NUM_DEVICES).
The non-privileged dev id range is [0, TEE_NUM_DEVICES / 2).

So when finding a slot for them, need to use different max value.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>

A single character (line break) should be put into a sequence.
Thus use the corresponding function "seq_putc".

This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>

Pull x86 fixes from Thomas Gleixner:
 "A small set of fixes for x86:

   - Add missing instruction suffixes to assembly code so it can be
     compiled by newer GAS versions without warnings.

   - Switch refcount WARN exceptions to UD2 as we did in general

   - Make the reboot on Intel Edison platforms work

   - A small documentation update so text and sample command match"

* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  Documentation, x86, resctrl: Make text and sample command match
  x86/platform/intel-mid: Handle Intel Edison reboot correctly
  x86/asm: Add instruction suffixes to bitops
  x86/entry/64: Add instruction suffix
  x86/refcounts: Switch to UD2 for exceptions

Pull x86/pti fixes from Thomas Gleixner:
 "Three fixes related to melted spectrum:

   - Sync the cpu_entry_area page table to initial_page_table on 32 bit.

     Otherwise suspend/resume fails because resume uses
     initial_page_table and triggers a triple fault when accessing the
     cpu entry area.

   - Zero the SPEC_CTL MRS on XEN before suspend to address a
     shortcoming in the hypervisor.

   - Fix another switch table detection issue in objtool"

* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu_entry_area: Sync cpu_entry_area to initial_page_table
  objtool: Fix another switch table detection issue
  x86/xen: Zero MSR_IA32_SPEC_CTRL before suspend

Pull timer fixes from Thomas Gleixner:
 "A small set of fixes from the timer departement:

   - Add a missing timer wheel clock forward when migrating timers off a
     unplugged CPU to prevent operating on a stale clock base and
     missing timer deadlines.

   - Use the proper shift count to extract data from a register value to
     prevent evaluating unrelated bits

   - Make the error return check in the FSL timer driver work correctly.
     Checking an unsigned variable for less than zero does not really
     work well.

   - Clarify the confusing comments in the ARC timer code"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  timers: Forward timer base before migrating timers
  clocksource/drivers/arc_timer: Update some comments
  clocksource/drivers/mips-gic-timer: Use correct shift count to extract data
  clocksource/drivers/fsl_ftm_timer: Fix error return checking