1. 16 Nov, 2020 37 commits
  2. 13 Nov, 2020 1 commit
  3. 26 Oct, 2020 2 commits
    • Tony Lindgren's avatar
      bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw · e7ae08d3
      Tony Lindgren authored
      Bail out early from sysc_wait_softreset() just like we do in sysc_reset()
      if there's no sysstatus srst_shift to fix a bogus resetdone warning on
      enable as suggested by Grygorii Strashko <grygorii.strashko@ti.com>.
      
      We do not currently handle resets for modules that need writing to the
      sysstatus register. If we at some point add that, we also need to add
      SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low
      when reset is done as described in the am335x TRM "Table 14-202
      SOFT_RESET Register Field Descriptions"
      
      Fixes: d46f9fbe ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
      Suggested-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
      Acked-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      e7ae08d3
    • Tony Lindgren's avatar
      bus: ti-sysc: Fix reset status check for modules with quirks · e275d210
      Tony Lindgren authored
      Commit d46f9fbe ("bus: ti-sysc: Use optional clocks on for enable and
      wait for softreset bit") started showing a "OCP softreset timed out"
      warning on enable if the interconnect target module is not out of reset.
      This caused the warning to be often triggered for i2c and hdq while the
      devices are working properly.
      
      Turns out that some interconnect target modules seem to have an unusable
      reset status bits unless the module specific reset quirks are activated.
      
      Let's just skip the reset status check for those modules as we only want
      to activate the reset quirks when doing a reset, and not on enable. This
      way we don't see the bogus "OCP softreset timed out" warnings during boot.
      
      Fixes: d46f9fbe ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      e275d210