- 16 Feb, 2022 4 commits
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Stephane Eranian authored
With the existing symbol_from/symbol_to, branches captured in the same function would be collapsed into a single function if the latencies associated with the each branch (cycles) were all the same. That is the case on Intel Broadwell, for instance. Since Intel Skylake, the latency is captured by hardware and therefore is used to disambiguate branches. Add addr_from/addr_to sort dimensions to sort branches based on their addresses and not the function there are in. The output is still the function name but the offset within the function is provided to uniquely identify each branch. These new sort dimensions also help with annotate because they create different entries in the histogram which, in turn, generates proper branch annotations. Here is an example using AMD's branch sampling: $ perf record -a -b -c 1000037 -e cpu/branch-brs/ test_prg $ perf report Samples: 6M of event 'cpu/branch-brs/', Event count (approx.): 6901276 Overhead Command Source Shared Object Source Symbol Target Symbol Basic Block Cycle 99.65% test_prg test_prg [.] test_thread [.] test_thread - 0.02% test_prg [kernel.vmlinux] [k] asm_sysvec_apic_timer_interrupt [k] error_entry - $ perf report -F overhead,comm,dso,addr_from,addr_to Samples: 6M of event 'cpu/branch-brs/', Event count (approx.): 6901276 Overhead Command Shared Object Source Address Target Address 4.22% test_prg test_prg [.] test_thread+0x3c [.] test_thread+0x4 4.13% test_prg test_prg [.] test_thread+0x4 [.] test_thread+0x3a 4.09% test_prg test_prg [.] test_thread+0x3a [.] test_thread+0x6 4.08% test_prg test_prg [.] test_thread+0x2 [.] test_thread+0x3c 4.06% test_prg test_prg [.] test_thread+0x3e [.] test_thread+0x2 3.87% test_prg test_prg [.] test_thread+0x6 [.] test_thread+0x38 3.84% test_prg test_prg [.] test_thread [.] test_thread+0x3e 3.76% test_prg test_prg [.] test_thread+0x1e [.] test_thread 3.76% test_prg test_prg [.] test_thread+0x38 [.] test_thread+0x8 3.56% test_prg test_prg [.] test_thread+0x22 [.] test_thread+0x1e 3.54% test_prg test_prg [.] test_thread+0x8 [.] test_thread+0x36 3.47% test_prg test_prg [.] test_thread+0x1c [.] test_thread+0x22 3.45% test_prg test_prg [.] test_thread+0x36 [.] test_thread+0xa 3.28% test_prg test_prg [.] test_thread+0x24 [.] test_thread+0x1c 3.25% test_prg test_prg [.] test_thread+0xa [.] test_thread+0x34 3.24% test_prg test_prg [.] test_thread+0x1a [.] test_thread+0x24 3.20% test_prg test_prg [.] test_thread+0x34 [.] test_thread+0xc 3.04% test_prg test_prg [.] test_thread+0x26 [.] test_thread+0x1a 3.01% test_prg test_prg [.] test_thread+0xc [.] test_thread+0x32 2.98% test_prg test_prg [.] test_thread+0x18 [.] test_thread+0x26 2.94% test_prg test_prg [.] test_thread+0x32 [.] test_thread+0xe 2.76% test_prg test_prg [.] test_thread+0x28 [.] test_thread+0x18 2.73% test_prg test_prg [.] test_thread+0xe [.] test_thread+0x30 2.67% test_prg test_prg [.] test_thread+0x30 [.] test_thread+0x10 2.67% test_prg test_prg [.] test_thread+0x16 [.] test_thread+0x28 2.46% test_prg test_prg [.] test_thread+0x10 [.] test_thread+0x2e 2.44% test_prg test_prg [.] test_thread+0x2a [.] test_thread+0x16 2.38% test_prg test_prg [.] test_thread+0x14 [.] test_thread+0x2a 2.32% test_prg test_prg [.] test_thread+0x2e [.] test_thread+0x12 2.28% test_prg test_prg [.] test_thread+0x12 [.] test_thread+0x2c 2.16% test_prg test_prg [.] test_thread+0x2c [.] test_thread+0x14 0.02% test_prg [kernel.vmlinux] [k] asm_sysvec_apic_ti+0x5 [k] error_entry Signed-off-by:Stephane Eranian <eranian@google.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kim Phillips <kim.phillips@amd.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Song Liu <songliubraving@fb.com> Link: http://lore.kernel.org/lkml/20220208211637.2221872-13-eranian@google.comSigned-off-by:
Arnaldo Carvalho de Melo <acme@redhat.com>
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Colin Ian King authored
There is a spelling mistake in a debug message. Fix it. Signed-off-by:
Colin Ian King <colin.i.king@gmail.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: kernel-janitors@vger.kernel.org Link: http://lore.kernel.org/lkml/20220214093547.44590-1-colin.i.king@gmail.comSigned-off-by:
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tangmeng authored
Return the result from hist_entry_iter__add() directly instead of taking this in another redundant variable. Signed-off-by:
tangmeng <tangmeng@uniontech.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220216030425.27779-1-tangmeng@uniontech.comSigned-off-by:
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tangmeng authored
The variable 'err' in the perf_event__process_sample() is only used in the only one judgment statement, it is not used in other places. So, use the return value from hist_entry_iter__add() directly instead of taking this in another redundant variable. Signed-off-by:
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- 15 Feb, 2022 36 commits
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Ian Rogers authored
When testing metric expressions we fake counter values from 1 going upward. For some metrics this can yield negative values that are clipped to zero, and then cause divide by zero failures. Such clipping is questionable but may be a result of tools automatically generating metrics. A workaround for this case is to try a second time with counter values going in the opposite direction. This case was seen in a metric like: event1 / max(event2 - event3, 0) But it may also happen in more sensible metrics like: event1 / (event2 + event3 - 1 - event4) Reviewed-by:
John Garry <john.garry@huawei.com> Signed-off-by:
Ian Rogers <irogers@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Link: https://lore.kernel.org/r/20211223185622.3435128-1-irogers@google.comSigned-off-by:
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James Clark authored
Now that a config flag for branch broadcast has been added, take it into account when trying to deduce what the driver would have programmed the TRCCONFIGR register to. Reviewed-by:
Leo Yan <leo.yan@linaro.org> Reviewed-by:
Mike Leach <mike.leach@linaro.org> Reviewed-by:
Suzuki Poulouse <suzuki.poulose@arm.com> Signed-off-by:
James Clark <james.clark@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: John Garry <john.garry@huawei.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Will Deacon <will@kernel.org> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-doc@vger.kernel.org Link: https://lore.kernel.org/r/20220113091056.1297982-4-james.clark@arm.comSigned-off-by:
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Yury Norov authored
Some code in builtin-c2c.c calls bitmap_weight() to check if any bit of a given bitmap is set. It's better to use bitmap_empty() in that case because bitmap_empty() stops traversing the bitmap as soon as it finds first set bit, while bitmap_weight() counts all bits unconditionally. Signed-off-by:
Yury Norov <yury.norov@gmail.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexey Klimov <aklimov@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: David Laight <david.laight@aculab.com> Cc: Dennis Zhou <dennis@kernel.org> Cc: Emil Renner Berthing <kernel@esmil.dk> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Joe Perches <joe@perches.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Cc: Michał Mirosław <mirq-linux@rere.qmqm.pl> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: http://lore.kernel.org/lkml/20220123183925.1052919-13-yury.norov@gmail.comSigned-off-by:
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Ian Rogers authored
Make the --tui command line flags dependent HAVE_SLANG_SUPPORT. This was reported as confusing in: https://lore.kernel.org/linux-perf-users/YevaTkzdXmFKdGpc@zx-spectrum.none/Reported-by:
xaizek <xaizek@posteo.net> Signed-off-by:
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Adrian Hunter authored
Add documentation for Event Trace and TNT disable to the perf Intel PT man page. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Link: https://lore.kernel.org/r/20220124084201.2699795-26-adrian.hunter@intel.comSigned-off-by:
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Adrian Hunter authored
Add sample flags to the PostgreSQL database definition and export. Signed-off-by:
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Adrian Hunter authored
Add sample flags to the SQLite database definition and export. Signed-off-by:
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Adrian Hunter authored
Currently, the transaction flag (x) is kept separate from branch flags. Instead of doing the same for the interrupt disabled flags (D and t), add all flags so that new flags will not need to be handled separately in the future. Signed-off-by:
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Adrian Hunter authored
Add Event Trace to the intel-pt-events.py script. This shows how to unpack the raw data from the new sample events in a Python script. Signed-off-by:
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Adrian Hunter authored
Amend the display to include D and t flags in the same way as the x flag. Signed-off-by:
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Adrian Hunter authored
Similar to other Intel PT synth events, display changes to the interrupt flag represented by the MODE.Exec packet. Signed-off-by:
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Adrian Hunter authored
Similar to other Intel PT synth events, display Event Trace events recorded by CFE / EVD packets. Signed-off-by:
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Adrian Hunter authored
It is not possible to walk the executable code without TNT packets, so force 'quick' mode when TNT is disabled, because 'quick' mode does not walk the code. Signed-off-by:
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Adrian Hunter authored
Update sample flags to represent the state and changes to the interrupt flag. Signed-off-by:
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Adrian Hunter authored
Synthesize an attribute event and sample events for changes to the interrupt flag represented by the MODE.Exec packet. Signed-off-by:
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Adrian Hunter authored
Synthesize an attribute event and sample events for Intel PT Event Trace events represented by CFE and EVD packets. Committer notes: Make 'struct perf_synth_intel_evd evd[]' evd[0] at the end of 'struct perf_synth_intel_evt' as it is breaking the build with in many compilers with (e.g. clang version 13.0.0 (Fedora 13.0.0-3.fc35)): util/intel-pt.c:2213:31: error: field 'cfe' with variable sized type 'struct perf_synth_intel_evt' not at the end of a struct or class is a GNU extension [-Werror,-Wgnu-variable-sized-type-not-at-end] struct perf_synth_intel_evt cfe; ^ Signed-off-by: -
Adrian Hunter authored
The change to the MODE.Exec packet means processing must distinguish between the old and new cases. Record the Event Trace capability flag to make that possible. Signed-off-by:
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Adrian Hunter authored
Add itrace option "I" to synthesize interrupt or similar (asynchronous) events. This will be used for Intel PT Event Trace events. Signed-off-by:
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Adrian Hunter authored
Define 2 new flags to represent: - when interrupts are disabled (D) - when interrupt disabling toggles (t) This gives 4 combinations: no flag, interrupts enabled t interrupts were enabled but become disabled D interrupts are disabled Dt interrupts were disabled but become enabled Committer notes: Those are control flow flags, as per 'tools/perf/Documentation/perf-intel-pt.txt: <quote> An interesting field that is not printed by default is 'flags' which can be displayed as follows: perf script --itrace=ibxwpe -F+flags The flags are "bcrosyiABExgh" which stand for branch, call, return, conditional, system, asynchronous, interrupt, transaction abort, trace begin, trace end, in transaction, VM-entry, and VM-exit respectively. </quote> Signed-off-by: -
Adrian Hunter authored
Similar to other Intel PT synth events, define a structure to hold information about a change to the interrupt flag. Signed-off-by:
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Adrian Hunter authored
Similar to other Intel PT synth events, define structures to hold CFE and EVD data. Signed-off-by:
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Adrian Hunter authored
As of Intel SDM (https://www.intel.com/sdm) version 076, there is a new Intel PT feature called Event Trace which adds a bit to the existing MODE.Exec packet to record the interrupt flag. Previously, the MODE.Exec packet did not generate any events, so the new processing required is practically the same as a new packet. Signed-off-by:
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Adrian Hunter authored
As of Intel SDM (https://www.intel.com/sdm) version 076, there is a new Intel PT feature called Event Trace which requires 2 new packets CFE (Control Flow Event) and EVD (Event Data). Each Event Trace event is represented by a CFE packet that is preceded by zero or more EVD packets. It may be bound to a following FUP (Flow Update) packet that provides the IP. Event Trace exposes details about asynchronous events. The CFE packet contains a type field to identify one of the following: 1 INTR interrupt, fault, exception, NMI 2 IRET interrupt return 3 SMI system management interrupt 4 RSM resume from system management mode 5 SIPI startup interprocessor interrupt 6 INIT INIT signal 7 VMENTRY VM-Entry 8 VMEXIT VM-Entry 9 VMEXIT_INTR VM-Exit due to interrupt 10 SHUTDOWN Shutdown For more details, refer to the Intel SDM, Intel Processor Trace chapter. Add processing to the decoder for the new packets. Signed-off-by:
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Adrian Hunter authored
Factor out clearing of FUP (Flow Update) event variables, to avoid code duplication. Committer Notes: From the Intel documentation: <quote> Flow Update Packets (FUP): FUPs provide the source IP addresses for asynchronous events (interrupt and exceptions), as well as other cases where the source address cannot be determined from the binary. </quote> Signed-off-by:
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Adrian Hunter authored
Tidy up config bit constants to use #define. Signed-off-by:
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Adrian Hunter authored
As of Intel SDM (https://www.intel.com/sdm) version 076, there is a new Intel PT feature called Event Trace which adds a bit to the existing MODE.Exec packet to record the interrupt flag. Amend the packet decoder and packet decoder test accordingly. Signed-off-by:
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Adrian Hunter authored
As of Intel SDM (https://www.intel.com/sdm) version 076, there is a new Intel PT feature called Event Trace which requires 2 new packets CFE and EVD. Add them to the packet decoder and packet decoder test. Committer notes: I got the "Intel
® 64 and IA-32 architectures software developer’s manual combined volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D, and 4" PDF at: https://cdrdv2.intel.com/v1/dl/getContent/671200 And these new packets are described in page 3951: <quote> 32.2.4 Event Trace is a capability that exposes details about the asynchronous events, when they are generated, and when their corresponding software event handler completes execution. These include: o Interrupts, including NMI and SMI, including the interrupt vector when defined. o Faults, exceptions including the fault vector. — Page faults additionally include the page fault address, when in context. o Event handler returns, including IRET and RSM. o VM exits and VM entries.¹ — VM exits include the values written to the “exit reason” and “exit qualification” VMCS fields. INIT and SIPI events. o TSX aborts, including the abort status returned for the RTM instructions. o Shutdown. Additionally, it provides indication of the status of the Interrupt Flag (IF), to indicate when interrupts are masked. </quote> Signed-off-by: -
Adrian Hunter authored
Minor whitespace fix up. Signed-off-by:
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Adrian Hunter authored
Make test_data 'static' otherwise it will conflict with any global variable of the same name. Signed-off-by:
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Ian Rogers authored
Note 01.org has no TremontX directory but in mapfile.csv the family and model: ... GenuineIntel-6-86,V1.17,/SNR/snowridgex_core_v1.17.json,core,,, GenuineIntel-6-86,V1.17,/SNR/snowridgex_uncore_v1.17.json,uncore,,, ... match TremontX in the perf mapfile.csv: ... GenuineIntel-6-86,v1,tremontx,core ... Events are at version 1.17: https://download.01.org/perfmon/SNR Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf floating-point.json is added. Tested: Not tested on a SnowridgeX/TremontX, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by:Kan Liang <kan.liang@linux.intel.com> Signed-off-by:
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Ian Rogers authored
Events are still at version 2: https://download.01.org/perfmon/WSM-EX Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf Tested: Not tested on a Westmere EX, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by: -
Ian Rogers authored
Events are still at version 2: https://download.01.org/perfmon/WSM-EP-SP Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf Tested: Not tested on a Westmere EP-SP, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by: -
Ian Rogers authored
Events are updated to version 1.06: https://download.01.org/perfmon/TGL Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf Tested: Not tested on a Tigerlake, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by: -
Ian Rogers authored
Events are still at version 14: https://download.01.org/perfmon/SLM Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf The addition of a floating-point.json is due to events having their topic better identified by the converter script. Tested: Not tested on a Silvermont, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by: -
Ian Rogers authored
Events are still at version 16: https://download.01.org/perfmon/SNB Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf Tested: Not tested on a Sandybridge, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by: -
Ian Rogers authored
Based on TMA_metrics-full.csv version 4.3 at 01.org: https://download.01.org/perfmon/ Events are still version 52: https://download.01.org/perfmon/SKL Json files generated by the latest code at: https://github.com/intel/event-converter-for-linux-perf Tested: Not tested on a Skylake, on a SkylakeX: ... 9: Parse perf pmu format : Ok 10: PMU events : 10.1: PMU event table sanity : Ok 10.2: PMU event map aliases : Ok 10.3: Parsing of PMU event table metrics : Ok 10.4: Parsing of PMU event table metrics with fake PMUs : Ok ... Reviewed-by:
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