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  1. 25 Mar, 2019 1 commit
  3. 07 Jan, 2019 1 commit
  5. 24 Nov, 2018 1 commit
  7. 11 Sep, 2018 3 commits
  9. 29 Aug, 2018 1 commit
  11. 09 Aug, 2018 1 commit
  13. 25 Jul, 2018 1 commit
  15. 20 Jul, 2018 1 commit
  17. 02 Jul, 2018 1 commit
    • Robin Gong's avatar
      dmaengine: imx-sdma: add virt-dma support · 57b772b8
      Robin Gong authored 
      The legacy sdma driver has below limitations or drawbacks:
  1. Hardcode the max BDs number as "PAGE_SIZE / sizeof(*)", and alloc
     one page size for one channel regardless of only few BDs needed
     most time. But in few cases, the max PAGE_SIZE maybe not enough.
  2. One SDMA channel can't stop immediatley once channel disabled which
     means SDMA interrupt may come in after this channel terminated.There
     are some patches for this corner case such as commit "2746e2c3

",
     but not cover non-cyclic.

The common virt-dma overcomes the above limitations. It can alloc bd
dynamically and free bd once this tx transfer done. No memory wasted or
maximum limititation here, only depends on how many memory can be requested
from kernel. For No.2, such issue can be workaround by checking if there
is available descript("sdmac->desc") now once the unwanted interrupt
coming. At last the common virt-dma is easier for sdma driver maintain.
Signed-off-by: default avatarRobin Gong <yibin.gong@nxp.com>
Reviewed-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Tested-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
      57b772b8
  19. 25 Apr, 2018 1 commit
  21. 27 Mar, 2018 1 commit
  23. 19 Mar, 2018 1 commit
  25. 24 Oct, 2017 1 commit
  27. 23 Oct, 2017 1 commit
  29. 12 Oct, 2017 1 commit
  31. 08 Oct, 2017 1 commit
    • Pierre-Yves MORDRET's avatar
      dmaengine: Add STM32 MDMA driver · a4ffb13c
      Pierre-Yves MORDRET authored 
      
This patch adds the driver for the STM32 MDMA controller.

Master Direct memory access (MDMA) is used in order to provide high-speed
data transfer between memory and memory or between peripherals and memory.

MDMA controller provides a master AXI interface for main memory and
peripheral registers access (system access port) and a master AHB
interface only for Cortex-M7 TCM memory access (TCM access port).

MDMA works in conjunction with the standard DMA controllers (DMA1 or DMA2).
It offers up to 64 channels, each dedicated to managing memory access
requests from one of the DMA stream memory buffer or other peripherals
(w/ integrated FIFO).
Signed-off-by: default avatarM'boumba Cedric Madianga <cedric.madianga@gmail.com>
Signed-off-by: default avatarPierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      a4ffb13c
  33. 27 Sep, 2017 1 commit
  35. 18 Jul, 2017 1 commit
    • Stefan Roese's avatar
      dmaengine: Add driver for Altera / Intel mSGDMA IP core · a85c6f1b
      Stefan Roese authored 
      
This driver adds support for the Altera / Intel modular Scatter-Gather
Direct Memory Access (mSGDMA) intellectual property (IP) to the Linux
DMAengine subsystem. Currently it supports the following op modes:

- DMA_MEMCPY
- DMA_SG
- DMA_SLAVE

This implementation has been tested on an Altera Cyclone FPGA connected
via PCIe, both on an ARM and an x86 platform.
Signed-off-by: default avatarStefan Roese <sr@denx.de>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      a85c6f1b
  37. 17 Jun, 2017 1 commit
  39. 15 Jun, 2017 1 commit
  41. 24 May, 2017 1 commit
    • Linus Walleij's avatar
      dmaengine: pl08x: Add support for Faraday Technology FTDMAC020 · 1e1cfc72
      Linus Walleij authored 
      
After reading the specs for the Faraday Technology FTDMAC020 found
in the Gemini platform, it becomes pretty evident that this is just
another PL08x derivative, and should be handled like such by simply
extending the existing PL08x driver to handle the quirks in this
hardware.

This patch makes memcpy work and has been tested on the Gemini and
also regression-tested on the Nomadik NHK15 using dmatest with
10 threads per channel without a hinch for hours.

I have not implemented slave DMA in those codepaths, because this
device (Gemini) does not use slave DMA, and it seems like devices
using FTDMAC020 for device DMA have a slightly different register
layout so some real hardware is needed to proceed with this. I
left some FIXME etc in the code for this.

I had to do some refactorings of some helper functions, but I have
not split those into separate patches because these refactorings
do not make much sense without the increased complexity of handling
the FTDMAC020.

The DMA test would hang the platform on me on the Gemini after a
few thousand iterations, however after turning of the caches the
problem immediately disappeared and I could run the DMA engine
with 10 threads pers physical channel for days in a row without
a crash. I think there is no problem with the DMA driver: instead
it is something fishy in the FA526 cache handling code that get
pretty heavily exercised by the DMA engine and we need to go and
fix that instead.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      1e1cfc72
  43. 19 May, 2017 1 commit
    • Arnd Bergmann's avatar
      dmaengine: bcm-sba-raid: fix Kconfig dependencies · 58d96125
      Arnd Bergmann authored 
      The new driver requires both mailbox and raid support for compile
testing:

drivers/dma/built-in.o: In function `sba_remove':
edma.c:(.text+0x4414): undefined reference to `mbox_free_channel'
drivers/dma/built-in.o: In function `sba_issue_pending':
edma.c:(.text+0x46cc): undefined reference to `mbox_send_message'
drivers/dma/built-in.o: In function `sba_probe':
edma.c:(.text+0x4e60): undefined reference to `mbox_request_channel'
edma.c:(.text+0x5038): undefined reference to `mbox_free_channel'
drivers/dma/built-in.o: In function `sba_tx_status':
edma.c:(.text+0x5210): undefined reference to `mbox_client_peek_data'

drivers/dma/built-in.o: In function `sba_prep_dma_pq_req':
edma.c:(.text+0x5784): undefined reference to `raid6_gflog'
edma.c:(.text+0x5798): undefined reference to `raid6_gflog'

This rearranges the Kconfig dependencies accordingly.

Fixes: 743e1c8f

 ("dmaengine: Add Broadcom SBA RAID driver")
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      58d96125
  45. 16 May, 2017 1 commit
  47. 01 May, 2017 1 commit
  49. 07 Mar, 2017 1 commit
  51. 05 Feb, 2017 1 commit
  53. 03 Jan, 2017 1 commit
  55. 02 Jan, 2017 1 commit
  57. 17 Nov, 2016 1 commit
  59. 14 Nov, 2016 2 commits
    • Vinod Koul's avatar
      dmaengine: st_fdma: Revert: Update st_fdma to 'depends on REMOTEPROC' · 6d066389
      Vinod Koul authored 
      This reverts commit 184e1396

 ("dmaengine:
st_fdma: Update st_fdma to 'depends on REMOTEPROC'") due to objection from
Bjorn.
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      6d066389
    • Paul Gortmaker's avatar
      dmaengine: tegra210-adma: convert TEGRA210_ADMA from bool to tristate · 3ed16793
      Paul Gortmaker authored 
      
This driver currently uses modular infrastructure but is controlled
by a bool Kconfig.

There is a general consensus from the DMA reviewers and maintainers
that "if it can be modular, it should be modular" in order to keep
the bzImage size under control for multi platform kernels.

Build tested only.  Also needed some new pm_clk symbols exported
before this commit is applied to tree in order to avoid modpost
errors like:

  ERROR: "pm_clk_add_clk" [drivers/dma/tegra210-adma.ko] undefined!
  ERROR: "pm_clk_create" [drivers/dma/tegra210-adma.ko] undefined!
  ERROR: "pm_clk_destroy" [drivers/dma/tegra210-adma.ko] undefined!
  ERROR: "pm_clk_suspend" [drivers/dma/tegra210-adma.ko] undefined!
  ERROR: "pm_clk_resume" [drivers/dma/tegra210-adma.ko] undefined!

These were added as exports in the v4.8-rc1 merge window.

Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Jon Hunter <jonathanh@nvidia.com>
Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: dmaengine@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      3ed16793
  61. 03 Nov, 2016 1 commit
  63. 18 Oct, 2016 2 commits
  65. 28 Sep, 2016 3 commits
  67. 27 Sep, 2016 1 commit
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