1. 20 Apr, 2017 2 commits
    • Ingo Molnar's avatar
      Merge tag 'perf-core-for-mingo-4.12-20170419' of... · 07590a7d
      Ingo Molnar authored
      Merge tag 'perf-core-for-mingo-4.12-20170419' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
      
      Pull perf/core cleanups from Arnaldo Carvalho de Melo:
      
       - Introduce new header files out of the hodge-podge that util/util.h
         became, trying to disentangle the includes hell that all C projects
         end up growing. This should help in build times, as changes to
         seemingly unrelated files (util.h included tons of headers) won't
         trigger a rebuild of most object files.
      
       - Use equivalent facilities found in the kernel source code base
         originated tools/include/ header files, such as __stringify(),
         ARRAY_SIZE, that has extra checks (__must_be_array()), etc.
      
       - For that get some more files from the kernel sources, like
         include/linux/bug.h, some just with the bits needed at this time.
      
       - Use the headers where facilities declared in them are used, such
         as PRIxu(32,64) macros (inttypes.h), errno defines (errno.h), etc.
      
       - Remove various leftovers from the initial code base we copied from
         git.git: FLEX_ARRAY, etc.
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      07590a7d
    • Ingo Molnar's avatar
      afa7a17f
  2. 19 Apr, 2017 28 commits
  3. 17 Apr, 2017 1 commit
  4. 14 Apr, 2017 3 commits
    • Kan Liang's avatar
      perf/x86: Fix spurious NMI with PEBS Load Latency event · fd583ad1
      Kan Liang authored
      Spurious NMIs will be observed with the following command:
      
        while :; do
          perf record -bae "cpu/umask=0x01,event=0xcd,ldlat=0x80/pp"
                        -e "cpu/umask=0x03,event=0x0/"
                        -e "cpu/umask=0x02,event=0x0/"
                        -e cycles,branches,cache-misses
                        -e cache-references -- sleep 10
        done
      
      The bug was introduced by commit:
      
        8077eca0 ("perf/x86/pebs: Add workaround for broken OVFL status on HSW+")
      
      That commit clears the status bits for the counters used for PEBS
      events, by masking the whole 64 bits pebs_enabled. However, only the
      low 32 bits of both status and pebs_enabled are reserved for PEBS-able
      counters.
      
      For status bits 32-34 are fixed counter overflow bits. For
      pebs_enabled bits 32-34 are for PEBS Load Latency.
      
      In the test case, the PEBS Load Latency event and fixed counter event
      could overflow at the same time. The fixed counter overflow bit will
      be cleared by mistake. Once it is cleared, the fixed counter overflow
      never be processed, which finally trigger spurious NMI.
      
      Correct the PEBS enabled mask by ignoring the non-PEBS bits.
      Signed-off-by: default avatarKan Liang <kan.liang@intel.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Vince Weaver <vincent.weaver@maine.edu>
      Fixes: 8077eca0 ("perf/x86/pebs: Add workaround for broken OVFL status on HSW+")
      Link: http://lkml.kernel.org/r/1491333246-3965-1-git-send-email-kan.liang@intel.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      fd583ad1
    • Ingo Molnar's avatar
      18c5c7c6
    • Peter Zijlstra's avatar
      perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32() · f2200ac3
      Peter Zijlstra authored
      When the perf_branch_entry::{in_tx,abort,cycles} fields were added,
      intel_pmu_lbr_read_32() wasn't updated to initialize them.
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-kernel@vger.kernel.org
      Cc: <stable@vger.kernel.org>
      Fixes: 135c5612 ("perf/x86/intel: Support Haswell/v4 LBR format")
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      f2200ac3
  5. 13 Apr, 2017 6 commits