- 24 Feb, 2016 40 commits
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Jitendra Bhivare authored
WARN_ON(atomic_read(&mccq->used) >= mccq->len) seen when FW gets into UE. MCCQ overflow is happening because driver discards any new request and frees up the tag. The tag allocation controls the number of MCC WRB posted. It is being replenished but WRBs are not hence the WARN_ON. Allocation and freeing of WRB and tags for MCC is now done in one place. This helps to achieve proper accounting of WRB indices and MCC tags. Signed-off-by:
Jitendra Bhivare <jitendra.bhivare@broadcom.com> Reviewed-by:
Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by:
Martin K. Petersen <martin.petersen@oracle.com>
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Jitendra Bhivare authored
In open with IP of unknown address family, only tag is freed and error returned. MCC WRB allocated for the operation is not freed. Added check for supported family of IP in the beginning before allocating the tag and WRB. Signed-off-by:
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Jitendra Bhivare authored
Remove confusingly named be_mcc_compl_is_new and be_mcc_compl_use functions in processing of BMBX. Rearrange beiscsi_process_mbox_compl function. Signed-off-by:
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Jitendra Bhivare authored
be_mcc_compl_poll waits till 'used' count of MCC WRBQ is zero. This is to determine the completion of an MCC sent. Change function to poll for the tag of MCC sent, instead, and wait till its tag_state is cleared. Signed-off-by:
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Jitendra Bhivare authored
be_mbox_notify_wait does exactly same thing as be_mbox_notify. Signed-off-by:
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Jitendra Bhivare authored
beiscsi_mccq_compl -> beiscsi_mccq_compl_wait - indicate blocking call. be_mcc_wait_compl -> be_mcc_compl_poll - indicate polling for completion. be_mbox_db_ready_wait -> be_mbox_db_ready_poll - indicate polling for RDY. be_mcc_compl_process -> beiscsi_process_mbox_compl - indicate BMBX compl. Signed-off-by:
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Jitendra Bhivare authored
be_mcc_compl_process_isr is removed. MCC CQ processing is done only in beiscsi_process_mcc_cq and MCC CQE processing is done only in beiscsi_process_mcc_compl. Signed-off-by:
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Jitendra Bhivare authored
Rename mcc_numtag to mcc_tag_status. MCC CQE status is processed using macros already defined in be_cmds.h. Add MCC_Q_WRB_ and MCC_Q_CMD_TAG_MASK macros to map to already defined CQE_STATUS_ macros to be consistent when posting MCC. Signed-off-by:
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Jitendra Bhivare authored
mcc_cq_lock spin_lock is used only in beiscsi_process_mcc which is called only when all interrupts are disabled from mgmt_epfw_cleanup during unloading of driver. There is no other context where there can be contention for the processing of CQ. Signed-off-by:
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Dan Carpenter authored
BFA_MFG_NAME is "QLogic" which is only 7 bytes, but we are copying 8 bytes. It's harmless because the badding byte is likely zero but it makes static checkers complain. Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Acked-by:
Anil Gurumurthy <anil.gurumurthy@qlogic.com> Signed-off-by:
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Maurizio Lombardi authored
The pd_seq_sync pointer can't be NULL, we have to check its entries instead. Signed-off-by:
Maurizio Lombardi <mlombard@redhat.com> Acked-by:
Sumit Saxena <sumit.saxena@broadcom.com> Reviewed-by:
Tomas Henzl <thenzl@redhat.com> Signed-off-by:
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Raghava Aditya Renukunta authored
Updated diver version to 41052 Signed-off-by:
Raghava Aditya Renukunta <raghavaaditya.renukunta@pmcs.com> Reviewed-by:
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Raghava Aditya Renukunta authored
During EEH PCI hotplug activity kernel unloads and loads the driver, causing character device to be unregistered(aac_remove_one).When the driver is loaded back using aac_probe_one the character device needs to be registered again for the AIF management tools to work. Fixed by adding code to register character device in aac_probe_one if it is unregistered in aac_remove_one. Signed-off-by:
Shane Seymour <shane.seymour@hpe.com> Reviewed-by:
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Raghava Aditya Renukunta authored
while driver removal is in progress or PCI shutdown is invoked, driver kills AIF aacraid thread, but IOCTL requests from the management tools re-start AIF thread leading to IOP_RESET. Fixed by setting adapter_shutdown flag when PCI shutdown is invoked. Signed-off-by:
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Raghava Aditya Renukunta authored
aac_mutex was used to create protect the ioctl path for only the compat path, it would be make more sense to place mutex in aac_do_ioctl, which is the main ioctl function call that handles all ioctl commands. Created new mutex ioctl_mutex in struct aac_dev to protect switch case in aac_do_ioctl and removed aac_mutex from aac_cfg_ioctl and aac_compat_do_ioctl Signed-off-by:
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Raghava Aditya Renukunta authored
Series 7 does not support PCI hot reset used by EEH. Enabled fundamental reset only for Series 7 Signed-off-by:
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Raghava Aditya Renukunta authored
During EEH recovery number of online CPU's might change thereby changing the number of MSIx vectors. Since each fib is allocated to a vector, changes in the number of vectors causes fib to be sent thru invalid vectors.In addition the correct number of MSIx vectors is not updated in the INIT struct sent to the controller, when it is reinitialized. Fixed by reassigning vectors to fibs based on the updated number of MSIx vectors and updating the INIT structure before sending to controller. Fixes: MSI-X vector calculation for suspend/resume Cc: stable@vger.kernel.org Signed-off-by:
Johannes Thumshirn <jthushirn@suse.de> Signed-off-by:
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Raghava Aditya Renukunta authored
aac_fib_map_free() calls pci_free_consistent() without checking that dev->hw_fib_va is not NULL and dev->max_fib_size is not zero.If they are indeed NULL/0, this will result in a hang as pci_free_consistent() will attempt to invalidate cache for the entire 64-bit address space (which would take a very long time). Fixed by adding a check to make sure that dev->hw_fib_va and dev->max_fib_size are not NULL and 0 respectively. Fixes: 9ad5204d - "[SCSI]aacraid: incorrect dma mapping mask during blinked recover or user initiated reset" Cc: stable@vger.kernel.org Signed-off-by:
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Raghava Aditya Renukunta authored
Added support for PCI EEH (extended error handling). Signed-off-by:
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Raghava Aditya Renukunta authored
The driver utilizes an array of atomic variables to keep track of IO submissions to each vector. To submit an IO multiple threads iterate through the array to find a vector which has empty slots to send an IO. The reading and updating of the variable is not atomic, causing race conditions when a thread uses a full vector to submit an IO. Fixed by mapping each FIB to a vector, the submission path then uses said vector to submit IO thereby removing the possibly of a race condition.The vector assignment is started from 1 since vector 0 is reserved for the use of AIF management FIBS.If the number of MSIx vectors is 1 (MSI or INTx mode) then all the fibs are allocated to vector 0. Fixes: 495c0217 "aacraid: MSI-x support" Cc: stable@vger.kernel.org # v4.1 Signed-off-by:
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Raghava Aditya Renukunta authored
The method to allocate and free FIB's in the present code utilizes spinlocks. Multiple IO's have to wait on the spinlock to acquire or free fibs creating a performance bottleneck. An alternative solution would be to use block layer tags to keep track of the fibs allocated and freed. To this end aac_fib_alloc_tag was created to utilize the blk layer tags to plug into the Fib pool.These functions are used exclusively in the IO path. 8 fibs are reserved for the use of AIF management software and utilize the previous spinlock based implementations. Signed-off-by:
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John Garry authored
Signed-off-by:
John Garry <john.garry@huawei.com> Reviewed-by:
Hannes Reinecke <hare@suse.de> Signed-off-by:
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
Include code to prep ssp frame and deliver to hardware. Signed-off-by:
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John Garry authored
Also include slot_complete_v2_hw handler Signed-off-by:
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John Garry authored
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John Garry authored
This also includes broadcast handler. Unlike v1 hw, broadcast does not have its own dedicated interrupt. Signed-off-by:
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
Add code to initialise the hardware. Support is also added to deal with the "am-max-transmissions" (amt) limitation in hip06 controller #1. This is how many connection requests we can send on the system bus before waiting for a response. Due to chip bus design, controller #1 is limited to 32 amt, while, by design, a controller supports 64. The default value for the nibbles in the relevant registers is 0x40; these need to be programmed with 0x20. Signed-off-by:
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John Garry authored
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John Garry authored
Just add enough to build and init the module. Signed-off-by:
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John Garry authored
Since hisi_sas_itct format is different between v1 and v2 hw, give more general names for some fields. Signed-off-by:
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John Garry authored
Since the error record structure is different for v2 hw, make hisi_sas_err_record opaque and add hisi_sas_err_record_v1. Signed-off-by:
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