- 18 Mar, 2016 9 commits
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Masahiro Yamada authored
Just for consistent coding style. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
Initial commit for PH1-Pro4 Sanji board support. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
Initial commit for PH1-Pro4 Ace board support. Note: There are two variants for the amount of DDR memory; 1GB or 2GB. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
This is used for on-board inter-connection. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
This board has an EEPROM (STMicroelectronics M24C64-WMN6TP) connected to the I2C channel 0 of the SoC. Its slave address is 0x54. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
Add master clock nodes generated by crystal oscillators. PH1-sLD3, PH1-LD4: 24.576 MHz PH1-Pro4, ProXstream2: 25.000 MHz PH1-Pro5: 20.000 MHz Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
During the review process of the UniPhier System Bus driver (drivers/bus/uniphier.c), the current binding of the System Bus Controller turned out to be no good. In order to make the driver really usable, we have to switch over to the new binding defined by Documentation/devicetree/bindings/bus/uniphier-system-bus.txt. The old binding will be still supported for a while to keep the backward compatibility. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
This property is used in common by several boards. Move it to the common place (uniphier-support-card.dtsi). If necessary, each board can still override the property. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Masahiro Yamada authored
Due to the company's awful projecting, this chip has been renamed to PH1-LD20. It has not been shipped yet, this change would have no impact on our customers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 02 Mar, 2016 1 commit
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Arnd Bergmann authored
Merge tag 'imx-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt2 Merge "i.MX device tree updates for 4.6" from Shawn Guo: - New i.MX6 board support: NXP/Freescale imx6qp boards, Advantech/GE, Uniwest evi, Engicam IMX6 Q7, Toradex Apalis SoM and Ixora carrier boards - Relicense vf610 dts files under GPLv2/X11 - A patch series from Stefan updating Vybrid Colibri board support with PMU, regulators and other devices enabled - Correct PWM pinmux for Ventana boards and add more pinmux for GW54xx - Clean up imx6q-tbs2910 dts file and add SATA PHY configuration - A series from Russell cleaning up hummingboard dts files - A series from Lothar updating Ka-Ro i.MX28, i.MX53 and i.MX6 boards to use better audio codec frequency and display configurations - Clean up whitespaces in i.MX6UL pinctrl header and add more devices support for the SoC - Other random dts updates to enable various devices * tag 'imx-dt-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (75 commits) ARM: dts: imx53-qsb: Fix gpio button polarity ARM: dts: vfxxx: Add DAC node for Vybrid SoC ARM: dts: imx6q: add missing links between ipu2 and mipi dsi ARM: dts: imx: Add support for Advantech/GE B850v3 ARM: dts: imx: Add support for Advantech/GE B650v3 ARM: dts: imx: Add support for Advantech/GE B450v3 ARM: dts: imx: Add support for Advantech/GE Bx50v3 ARM: dts: imx: Add Advantech BA-16 Qseven module of: Add vendor prefix for General Electric Company of: Add vendor prefix for Advantech Corporation ARM: dts: imx35.dtsi: change the clock information for usb ARM: dts: imx25.dtsi: change the clock information for usb ARM: dts: imx6ul: add kpp support ARM: dts: imx6ul: add gpmi support ARM: dts: imx6ul: add lcdif support ARM: dts: imx6ul: add sai support ARM: dts: imx6ul: add flexcan support ARM: dts: imx6ul: add sdma support ARM: dts: imx6ul: add pwm[1-4] nodes ARM: dts: imx6ul: disable PWMs by default ...
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- 01 Mar, 2016 1 commit
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Sascha Hauer authored
The polarity of the gpio buttons is defined to '0' which is active high. The buttons are active low though which has been verified by testing it and by looking into the schematics. While at it use defines rathers than numbers for the key codes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 29 Feb, 2016 29 commits
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Sanchayan Maity authored
Add a device tree node entry for DAC peripheral on Vybrid SoC. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Philipp Zabel authored
The backlinks are already there since commit 4520e692 ("ARM: dts: imx6qdl: Add IPU DI ports and endpoints, move imx-drm node to dtsi") and were moved by commit 70c2652c ("ARM: dts: imx6qdl: Move existing MIPI DSI ports into a new 'ports' node"), but the links from IPU2 DI0/1 to the MIPI DSI mux are missing. Fix this. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
Add support for Advantech/GE B850v3 board. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
Add support for Advantech/GE B650v3 board. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
Add support for Advantech/GE B450v3 board. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Justin Waters authored
Advantech has 3 carrier boards (B450v3, B650v3, B850v3) which use the Advantech BA-16 module (based on iMX6D). This file has the devicetree entries that are common to all 3 boards. Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Justin Waters authored
Add support for Advantech BA-16 module based on iMX6D processor Basic information about the module: - Module manufacturer: Advantech - CPU: Freescale ARM Cortex-A9 i.MX6 - SPECS: Up to 2GB Onboard DDR3 Memory; Up to 16GB Onboard eMMC NAND Flash Supports OpenGL ES 2.0 and OpenVG 1.1 HDMI, 24-bit LVDS 1x UART, 2x I2C, 8x GPIO, 4x Host USB 2.0 port, 1x USB OTG port, 1x micro SD (SDHC),1x SDIO, 1x SATA II, 1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2 - Website: http://goo.gl/JED98USigned-off-by: Akshay Bhat <akshay.bhat@timesys.com> Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
This patch adds vendor prefix for General Electric Company Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Akshay Bhat authored
This patch adds vendor prefix for Advantech Corporation. Website: http://www.advantech.com/Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
For imx35, it needs three clocks to let the controller work, the old code is wrong, and the usbmisc does not include clock handling code any more. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
For imx25, it needs three clocks to let the controller work, the old code is wrong, and usbmisc has not included clock handling code any more. Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
This patch adds the device node for the i.MX6UL keypad controller. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add the device node for the i.MX6UL GPMI interface and the related APBH DMA which is necessary for the GPMI to work properly. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add the device node for the i.MX6UL eLCDIF interface. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add device nodes for the i.MX6UL synchronous audio interfaces (SAI). Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add device nodes for the i.MX6UL flexcan interfaces. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add device node for the i.MX6UL SDMA unit. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Add device nodes for the PWM uinits 1..4 which were missing in the original commit for i.MX6UL support. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Since PWMs are only useful if they are actually connected to an output pin, let users enable them explicitly in their device trees where they should also set up the pin configuration. This is in sync with a recent change (commit e2675266 "ARM: dts: imx6qdl: disable PWMs by default") to other i.MX SoCs. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
i.MX6UL PWMs require real clocks. Define the appropriate clocks for the PWM units. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
The i.MX6UL GPT unit requires real clocks. Define the appropriate clocks to make it work. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
imx6ul.dtsi references the macro 'KEY_POWER' from dt-bindings/input/input.h. Thus, move the include statement for this file from imx6ul-14x14-evk.dts to imx6ul.dtsi itself. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Move the tsc node to keep the nodes sorted in ascending order by unit address. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Pad DISPB2_SER_RS has no function DISP1_EXT_CLK. The definition is obviusly a copy/paste error from MX51_PAD_DISPB2_SER_RS__DISP1_PIN16. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Various pads are missing the input_sel offset and value. Fix this. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lothar Waßmann authored
Remove whitespace before TAB in indentation and reduce indentation level to improve readability. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bhuvanchandra DV authored
Add pinmux for UART_A RTS, CTS pin's. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
All Freescale Vybrid SoC include a Cortex-A5 core which supports ARM's standard PMU (performance monitoring unit). Include the monitoring unit into the Cortex-A5 base device tree vf500.dtsi. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
The Colibri standard does not define a pin for SD-Card write- protection. Use the disable-wp property to indicate that there is no physical WP line present. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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