- 26 Jul, 2010 27 commits
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Ben Skeggs authored
Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
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Ben Skeggs authored
Reported-by:
Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by:
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Francisco Jerez authored
Signed-off-by:
Francisco Jerez <currojerez@riseup.net> Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
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Francisco Jerez authored
I was hoping we could detect I2C devices at a given address without actually writing data into them, but apparently some DDC slaves get confused with 0-bytes transactions. Put the good old test back. Reported-by:
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Francisco Jerez authored
BIOS scripts usually make an attempt to reset the AGP controller, however on some nv4x cards doing it properly involves switching FW off and on: if we do that without updating the AGP bridge settings accordingly (e.g. with the corresponding calls to agp_enable()) we will be locking ourselves out of the card MMIO space. Do it from nouveau_mem_reset_agp() before the init scripts are executed. Signed-off-by:
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Francisco Jerez authored
Fixes the randomly flashing vertical lines seen on some nv3x after a cold-boot. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Francisco Jerez authored
Fixes suspend+multihead on some boards that also use BIOS scripts for modesetting. Signed-off-by:
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Francisco Jerez authored
Locking only makes sense in the VBIOS parsing code as it's executed before CRTC init. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
Clean up and move the external TV encoder detection code to nouveau_i2c.c, it's also going to be useful for external TMDS and DDC detection. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
Init-compute-mem was the last piece missing for nv0x-nv3x card cold-booting. This implementation is somewhat lacking but it's been reported to work on most chipsets it was tested in. Let me know if it breaks suspend to RAM for you. Signed-off-by:
Patrice Mandin <patmandin@gmail.com> Tested-by:
Xavier Chantry <chantry.xavier@gmail.com> Tested-by:
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Francisco Jerez authored
Also collect all the PFB registers in a single place and remove some duplicated definitions. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
Rescaling interlaced modes isn't going to work correctly, and even if it did, come on, interlaced flat panels? are you pulling my leg? Signed-off-by:
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Francisco Jerez authored
It doesn't like variable length arrays. Signed-off-by:
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Ben Skeggs authored
A previous commit started additionally using the SOR link when trying to match the correct output script. However, we never fill in this field for LVDS so we can never match a script at all. Signed-off-by: -
Ben Skeggs authored
Based on a patch from Matthew Garrett. Signed-off-by:
Matthew Garrett <mjg@redhat.com>
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Ben Skeggs authored
There's a report of this quirk breaking modesetting on at least one board. After discussion with Francisco Jerez, we've decided to remove it: <darktama> it's not worth limiting the quirk to just where we know it can work? i'm happy either way really :) <curro> hmm, don't think so, most if not all DCB15 cards have just one DAC <curro> and with that quirk there's no way to tell if the load comes from the VGA or DVI port Signed-off-by: -
Ben Skeggs authored
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- 13 Jul, 2010 13 commits
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Francisco Jerez authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
On nv50 it became impossible to attempt a PCI ROM shadow of the VBIOS, which will break some setups. This patch also removes the different ordering of shadow methods for pre-nv50 chipsets. The reason for the different ordering was paranoia, but it should hopefully be OK to try shadowing PRAMIN first. Signed-off-by: -
Francisco Jerez authored
Fixes a lockup when coming back from suspend. Signed-off-by:
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Francisco Jerez authored
On older cards (<nv17) scanout gets blocked when the ROM is being accessed. PROM access usually comes out enabled from suspend, switch it off. Signed-off-by:
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Francisco Jerez authored
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Ben Skeggs authored
In some situations it's possible we can receive a spurious hotplug IRQ before we're ready to handle it, leading to an oops. Calling the display init before enabling interrupts should clear any pending IRQs on the GPU and prevent this from happening. Signed-off-by: -
Ben Skeggs authored
It seems on some chipsets that doing this from the 0x20 handler causes the display engine to not ever signal the final 0x40 stage. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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