- 03 Dec, 2013 4 commits
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Olof Johansson authored
BeagleBone Black uses the TI CPSW ethernet controller, enable it in the multi_v7_defconfig for testing coverage purposes. Signed-off-by:
Olof Johansson <olof@lixom.net> Acked-by:
Tony Lindgren <tony@atomide.com> Cc: stable@vger.kernel.org # v3.12
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git://github.com/at91linux/linux-at91Olof Johansson authored
From Nicolas Ferre: AT91: second round of fixes for 3.13 - reduce IP frequency for I2C on sama5d3 - missing aliases directive for USART3 on 9x5 family - a PM symbol is missing if !CONFIG_PM * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM ARM: at91: add usart3 alias to dtsi ARM: at91: sama5d3: reduce TWI internal clock frequency
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git://git.infradead.org/linux-mvebuOlof Johansson authored
From Jason Cooper, mvebu DT fixes for v3.13: - mvebu - PCIe fixes now that we have test devices with more ports. - fix access to coherency registers * tag 'mvebu-dt-fixes-3.13' of git://git.infradead.org/linux-mvebu: ARM: mvebu: re-enable PCIe on Armada 370 DB ARM: mvebu: use the virtual CPU registers to access coherency registers ARM: mvebu: fix second and third PCIe unit of Armada XP mv78260 ARM: mvebu: second PCIe unit of Armada XP mv78230 is only x1 capable -
Olof Johansson authored
Merge tag 'omap-for-v3.13/fixes-against-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: Some omap related fixes that have come up with people moving to device tree only based booting for omap2+. The series contains a handful of fixes for the igep boards as they were one of the first omap3 boards to jump over completely to device tree based booting. So these can be considered regressions compared to booting igep in legacy mode with board files in v3.12. Also included are few other device tree vs legacy booting regressions: - yet more missing omap3 .dtsi entries that have showed up booting various boards with device tree only - n900 eMMC device tree fix - fixes for beagle USB EHCI - two fixes to make omap2420 MMC work As we're moving omap2+ to be device tree only for v3.14, I'd like to have v3.13 work equally well for legacy based booting and device tree based booting. So there will be likely few more device tree related booting patches trickling in. This series also includes a regression fix for the omap timer posted mode that may wrongly stay on from the bootloader for some SoCs. * tag 'omap-for-v3.13/fixes-against-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: mmc: omap: Fix I2C dependency and make driver usable with device tree mmc: omap: Fix DMA configuration to not rely on device id ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13) ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi ARM: dts: AM33XX IGEP0033: add USB support ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support ARM: dts: AM33XX BASE0033: add pinmux and user led support ARM: dts: AM33XX BASE0033: add pinmux and hdmi node to enable display ARM: dts: omap3-igep0020: Add pinmuxing for DVI output ARM: dts: omap3-igep0020: Add pinmux setup for i2c devices ARM: dts: omap3-igep: Update to use the TI AM/DM37x processor ARM: dts: omap3-igep: Add support for LBEE1USJYC WiFi connected to SDIO ARM: dts: omap3-igep: Fix bus-width for mmc1 ARM: OMAP2+: dss-common: change IGEP's DVI DDC i2c bus ARM: OMAP2+: Disable POSTED mode for errata i103 and i767 ARM: OMAP2+: Fix eMMC on n900 with device tree ARM: OMAP2+: Add fixed regulator to omap2plus_defconfig ARM: OMAP2+: Fix more missing data for omap3.dtsi file Signed-off-by:
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- 02 Dec, 2013 3 commits
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Brent Taylor authored
If CONFIG_PM is not defined, then arch/arm/mach-at91/pm.c is not compiled in. This patch creates an inline function that does nothing if CONFIG_PM is not defined. Signed-off-by:
Brent Taylor <motobud@gmail.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Alias was missing for SoC of the at91sam9x5 familly that embed USART3. Reported-by:
Jiri Prchal <jiri.prchal@aksignal.cz> [b.brezillon@overkiz.com: advised to place changes in at91sam9x5_usart3.dtsi] Acked-by:
Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by:
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Ludovic Desroches authored
With some devices, transfer hangs during I2C frame transmission. This issue disappears when reducing the internal frequency of the TWI IP. Even if it is indicated that internal clock max frequency is 66MHz, it seems we have oversampling on I2C signals making TWI believe that a transfer in progress is done. This fix has no impact on the I2C bus frequency. Cc: <stable@vger.kernel.org> #3.10+ Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by:
Wolfram Sang <wsa@the-dreams.de> Acked-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by:
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- 26 Nov, 2013 22 commits
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Tony Lindgren authored
Some features can be configured by the companion I2C chips, which may not be available at the probe time. Fix the issue by returning -EPROBE_DEFER when the MMC controller slots are not configured. While at it, let's also add minimal device tree support so omap24xx platforms can use this driver without legacy mode since we claim to support device tree for mach-omap2 based systems. Although adding the minimal device tree support is not strictly a fix, it does remove one of the last blockers for dropping a bunch of legacy platform data for mach-omap2. Cc: linux-mmc@vger.kernel.org Acked-by:
Chris Ball <cjb@laptop.org> Signed-off-by:
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Tony Lindgren authored
We are wrongly relying on device id for the DMA configuration which can lead to wrong DMA channel being selected. Fix the issue by using the standard resources like we should. Cc: linux-mmc@vger.kernel.org Acked-by:
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Roger Quadros authored
Beagle (rev. C4) and Beagle-XM (all revs) need VAUX2 1.8V supply for the USB PHY. As the generic PHY driver can't handle more than one supply at the moment, we configure this supply to be always on. This will cause a very small power impact if the USB host subsystem is not in use, about 76.86 micro-W + LDO power. Older Beagle boards (prior to C4) don't have VAUX2 connected anywhere, so there won't be any functional impact on those boards other than some additional LDO power consumption. Reported-by:
Nishanth Menon <nm@ti.com> Tested-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
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Javier Martinez Canillas authored
On Device Tree boot the VDDS_DSI regulator is not linked to the DPI device so omapfb driver probing fails with: [ 3.186035] OMAPFB: omapfb_probe [ 3.190704] omapdss DPI error: can't get VDDS_DSI regulator [ 3.196594] omapfb omapfb: failed to connect default display [ 3.202667] omapfb omapfb: failed to init overlay connections [ 3.208892] OMAPFB: free_resources [ 3.212493] OMAPFB: free all fbmem [ 3.216735] omapfb omapfb: failed to setup omapfb As a workaround name the VPLL2 regulator from twl4030 as vdds_dsi so getting the VDDS_DSI regulator will succeed on dpi_init_regulator(). Signed-off-by:
Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by:
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Enric Balletbo i Serra authored
Add node to support the USB Host and the USB OTG on the IGEP AQUILA Processor Board. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by:
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Enric Balletbo i Serra authored
The IGEP AQUILA EXPANSION has a 32KBit EEPROM for user data storage. Signed-off-by:
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Enric Balletbo i Serra authored
Enable the user leds on the IGEP AQUILA EXPANSION. The has two leds, one green and one red, that are controllable by software. Signed-off-by:
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Enric Balletbo i Serra authored
Enable the hdmi output and the LCD Controller on IGEP AQUILA. Also configure the correct pinmux for output of video data from the SoC to the HDMI encoder. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by:
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Javier Martinez Canillas authored
The IGEPv2 has a TFP410 DPI-to-DVI encoder attached to OMAP's Display SubSystem (DSS). Add mux setup for DSS pins and also for the GPIO 170 pin that is used to ensure that the DVI-D is powered down on power up. Signed-off-by:
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Javier Martinez Canillas authored
Add pin muxing support for IGEP boards i2c controllers. Signed-off-by:
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Enric Balletbo i Serra authored
Most of the boards are using the TI AM/DM37x processor, there is only a small quantity of IGEP Processor Boards based on TI OMAP3530. So it's better use the omap36xx.dtsi include instead of omap34xx.dtsi include. We can add support for the 34xx based variant later on as needed. To avoid confusion we have added to the model the (TI AM/DM37x) comment. Signed-off-by:
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Enric Balletbo i Serra authored
The LBEE1USJYC is a WiFi/BT combo module used on OMAP3-based IGEP boards. In both cases, IGEPv2 Rev. C and IGEP COM MODULE, the module is connected using the same MMC interface and uses the same GPIOs. Signed-off-by:
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Enric Balletbo i Serra authored
Both, IGEPv2 and IGEP COM MODULE have a bus-width of 4 not 8, so fix this and do not mux data pins from mmc1_data4 to mmc1_data7. Signed-off-by:
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Javier Martinez Canillas authored
IGEP's DVI connector's DDC pins are connected to OMAP's third i2c bus. When booting with Device Trees the requested bus number is set to -1 which means that the bus number should be dynamically assigned. So the third i2c bus has 2 has a bus number. Since now only DT booting is supported for IGEP boards after commit 06ff74fd ("ARM: OMAP2+: remove legacy support for IGEP boards"), the i2c bus number has to be changed. Signed-off-by:
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Joel Fernandes authored
Enabling of Posted mode is seen to cause problems on dmtimer modules on AM33xx (much like other OMAPs). Reference discussions on forums [1] [2]. Earlier patch solving this on other OMAPs [3]. For OMAP SoCs with this errata, the fix has been to not enable Posted mode. However, on some SoCs (atleast AM33xx) which carry this errata, Posted mode is enabled on reset. So we not only need to ignore enabling of the POSTED bit when the timer is requested, but also disable Posted mode if errata is present. [1] http://e2e.ti.com/support/arm/sitara_arm/f/791/t/285744.aspx [2] http://e2e.ti.com/support/arm/sitara_arm/f/791/t/270632.aspx [3] http://www.spinics.net/lists/linux-omap/msg81770.html Cc: stable@vgerk.kernel.org Reported-by:
Russ Dill <russ.dill@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Joel Fernandes <joelf@ti.com> Signed-off-by:
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Olof Johansson authored
Merge tag 'ux500-defconfig-v3.13-rcs' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes From Linus Walleij, Ux500 defconfig patches for the v3.13 rc series: - Allow creation and mounting of devtmpfs, which is used by OpenEmbedded root filesystems among others. - Enable CPUidle for the ux500, it has been accidentally disabled due to a Kconfig change. * tag 'ux500-defconfig-v3.13-rcs' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: u8500_defconfig: add missing cpuidle option u8500_defconfig: allow creation and mounting of devtmpfs
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Olof Johansson authored
Merge tag 'ux500-fixes-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes From Linus Walleij, Ux500 fixes for the v3.13 series: - Restore platform data for the (e)MMC/SD controllers, so they can pins and special flags properly like before. * tag 'ux500-fixes-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: Revert "ARM: ux500: Stop passing MMC's platform data for Device Tree boots" Revert "ARM: ux500: Remove AUXDATA relating to SDI (MMC) clock-name bindings"
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Linus Walleij authored
This reverts commit 49c12951. The special settings for the SD/MMC card parameters that are not yet fully agreed upon how to encode into the device tree went missing with this commit. We need to first put it into the device tree, and then remove the platform data. Cc: Lee Jones <lee.jones@linaro.org> Reviewed-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This reverts commit ce16feb8. This commit stopped tying down the name of the MMC/SD devices, but these names are used in the pin control table, so the MMC/SD cards stopped working. Cc: Lee Jones <lee.jones@linaro.org> Reviewed-by:
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Daniel Lezcano authored
With the commit d3f2950f, the option ARM_U8500_CPUIDLE was added to the Kconfig but not reflected in the default config file, hence the cpuidle driver is no longer enabled since this commit. Enable it again by adding the missing option in the default config file. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Andi Shyti authored
This patch enables CONFIG_DETTMPFS and CONFIG_DEVTMPFS_MOUNT flags for u8500 based devices. In this way it's possible to create a tmpfs/ramfs already in the early stages of the boot, allowing programs like udev/mdev to populate the /dev directory. Signed-off-by:
Andi Shyti <andi@etezian.org> Signed-off-by:
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Stephen Warren authored
The I2C controller node needs #address-cells and #size-cells properties, but these are currently missing. Add them. This allows child nodes to be parsed correctly. Cc: stable@vger.kernel.org Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
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- 25 Nov, 2013 11 commits
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git://git.linaro.org/people/shawnguo/linux-2.6Kevin Hilman authored
The imx fixes for 3.13, part 2: - Disable S/PDIF "rxtx5" clock option to fix the clocksource breakage introduced by S/PDIF driver * tag 'imx-fixes-3.13-2' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: imx6qdl: disable spdif "rxtx5" clock option Signed-off-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
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Doug Anderson authored
Without the interrupt you'll get problems if you enable CONFIG_RTC_DRV_MAX77686. Setup the interrupt properly in the device tree. Signed-off-by:
Doug Anderson <dianders@chromium.org> Tested-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
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Tony Lindgren authored
Looks like we need to configure the regulators and use the pdata quirk to make eMMC work with device tree. It seems that mostly vaux3 is used, and only some earlier revisions used vmmc2. This has been tested to work on devices where the system_rev passed by the bootloader has versions 0x0010, 0x2101 and 0x2204. Cc: devicetree@vger.kernel.org Cc: Pavel Machek <pavel@ucw.cz> Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by:
Sebastian Reichel <sre@debian.org> [tony@atomide.com: updated with pinctrl changes and comments from Sebastian] Signed-off-by:
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Tony Lindgren authored
We do not have REGULATOR_FIXED selected if no boards are selected and we boot with device tree. This can cause various devices to fail. Signed-off-by: -
Tony Lindgren authored
After dropping the duplicate data in hwmod that now should come from the .dts files, I noticed few more entries missing. Let's add these as otherwise devices relying on these won't work. Looks like the side tone entries are bundled into the mcbsp1 to 3, so that may needs some special handling in the hwmod code as it's currently trying to look up mcbsp2_sidetone and mcbsp3_sidetone entries. Signed-off-by: -
Dave Martin authored
This patch implements the power_down_finish() method for TC2, to enable the kernel to confirm when CPUs are safely powered down. The information required for determining when a CPU is parked cannot be obtained from any single place, so a few sources of information must be combined: * mcpm_cpu_power_down() must be pending for the CPU, so that we don't get confused by false STANDBYWFI positives arising from CPUidle. This is detected by waiting for the tc2_pm use count for the target CPU to reach 0. * Either the SPC must report that the CPU has asserted STANDBYWFI, or the TC2 tile's reset control logic must be holding the CPU in reset. Just checking for STANDBYWFI is not sufficient, because this signal is not latched when the the cluster is clamped off and powered down: the relevant status bits just drop to zero. This means that STANDBYWFI status cannot be used for reliable detection of the last CPU in a cluster reaching WFI. This patch is required in order for kexec to work with MCPM on TC2. MCPM code was changed in commit 0de0d646 ('ARM: 7848/1: mcpm: Implement cpu_kill() to synchronise on powerdown'), and since then it will hit a WARN_ON_ONCE() due to power_down_finish not being implemented on the TC2 platform. Signed-off-by:Dave Martin <Dave.Martin@arm.com> Acked-by:
Pawel Moll <pawel.moll@arm.com> Reviewed-by:
Nicolas Pitre <nico@linaro.org> Signed-off-by:
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Thierry Reding authored
In order to support increased build test coverage for drivers, implement dummies for the powergate implementation. This will allow the drivers to be built without requiring support for Tegra to be selected. This patch solves the following build errors, which can be triggered in v3.13-rc1 by selecting DRM_TEGRA without ARCH_TEGRA: drivers/built-in.o: In function `gr3d_remove': drivers/gpu/drm/tegra/gr3d.c:321: undefined reference to `tegra_powergate_power_off' drivers/gpu/drm/tegra/gr3d.c:325: undefined reference to `tegra_powergate_power_off' drivers/built-in.o: In function `gr3d_probe': drivers/gpu/drm/tegra/gr3d.c:266: undefined reference to `tegra_powergate_sequence_power_up' drivers/gpu/drm/tegra/gr3d.c:273: undefined reference to `tegra_powergate_sequence_power_up' Signed-off-by:
Thierry Reding <treding@nvidia.com> [swarren, updated commit description] Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
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Olof Johansson authored
Merge tag 'omap-for-v3.13/more-fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: Few more fixes for issues found booting older omaps using device tree. Also few randconfig build fixes and removal of some dead code for omap4 as it no longer has legacy platform data based booting support. * tag 'omap-for-v3.13/more-fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Remove legacy omap4_twl6030_hsmmc_init ARM: OMAP2+: Remove legacy mux code for display.c ARM: OMAP2+: Fix undefined reference to set_cntfreq gpio: twl4030: Fix passing of pdata in the device tree case gpio: twl4030: Fix regression for twl gpio output ARM: OMAP2+: More randconfig fixes for reconfigure_io_chain ARM: dts: Fix omap2 specific dtsi files by adding the missing entries ARM: OMAP2+: Fix GPMC and simplify bootloader timings for 8250 and smc91x i2c: omap: Fix missing device tree flags for omap2
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Olof Johansson authored
Some omap3 code is throwing a warning: arch/arm/mach-omap2/pm34xx.c: In function 'omap3_save_secure_ram_context': arch/arm/mach-omap2/pm34xx.c:123:32: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] In reality this code will never actually execute with LPAE=y, since Cortex-A8 doesn't support it. So downcasting the __pa() is safe in this case. Signed-off-by:
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Thomas Petazzoni authored
Commit 14fd8ed0 ("ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes") relocated the PCIe controller DT nodes one level up in the Device Tree, to reflect a more correct representation of the hardware introduced by the mvebu-mbus Device Tree binding. However, while most of the boards were properly adjusted accordingly, the Armada 370 DB board was left unchanged, and therefore, PCIe is seen as not enabled on this board. This patch fixes that by moving the PCIe controller node one level-up in armada-370-db.dts. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.12+ Fixes: 14fd8ed0 "ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes" Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
The Armada XP provides a mechanism called "virtual CPU registers" or "per-CPU register banking", to access the per-CPU registers of the current CPU, without having to worry about finding on which CPU we're running. CPU0 has its registers at 0x21800, CPU1 at 0x21900, CPU2 at 0x21A00 and CPU3 at 0x21B00. The virtual registers accessing the current CPU registers are at 0x21000. However, in the Device Tree node that provides the register addresses for the coherency unit (which is responsible for ensuring coherency between processors, and I/O coherency between processors and the DMA-capable devices), a mistake was made: the CPU0-specific registers were specified instead of the virtual CPU registers. This means that the coherency barrier needed for I/O coherency was not behaving properly when executed from a CPU different from CPU0. This patch fixes that by using the virtual CPU registers. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
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