- 25 Jun, 2015 2 commits
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Vinod Koul authored
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Vinod Koul authored
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- 17 Jun, 2015 2 commits
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Robert Jarzmik authored
Add documentation about acking the transfers, and their reusability. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Robert Jarzmik authored
This patch attempts to enhance the case of a transfer submitted multiple times, and where the cost of creating the descriptors chain is not negligible. This happens with big video buffers (several megabytes, ie. several thousands of linked descriptors in one scatter-gather list). In these cases, a video driver would want to do : - tx = dmaengine_prep_slave_sg() - dma_engine_submit(tx); - dma_async_issue_pending() - wait for video completion - read video data (or not, skipping a frame is also possible) - dma_engine_submit(tx) => here, the descriptors chain recalculation will take time => the dma coherent allocation over and over might create holes in the dma pool, which is counter-productive. - dma_async_issue_pending() - etc ... In order to cope with this case, virt-dma is modified to prevent freeing the descriptors upon completion if DMA_CTRL_ACK flag is set in the transfer. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 12 Jun, 2015 1 commit
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Maxime Ripard authored
This reverts commit 48a9db46. Some platforms actually need support for the memset operations. Bring it back. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 10 Jun, 2015 5 commits
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Lior Amsalem authored
This patch change the way free descriptors are marked. Instead of having a field for descriptor in use, all the descriptors in the all_slots list are free for use. This simplify the allocation method and reduce the locking needed. Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Lior Amsalem authored
Now that we have 2 channels assigned to 2 CPUs and all requests are chained on same channels, we need much more descriptors available to satisfy async_tx workload. 3072 descriptors was found in our lab as the number of descriptors which allow the async_tx stack to work without waiting for free descriptors on submission of new requests. Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Tested-by: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Lior Amsalem authored
The Marvell Armada 38x SoC introduce new features to the XOR engine, especially the fact that the engine mode (MEMCPY/XOR/PQ/etc) can be part of the descriptor and not set through the controller registers. This new feature allows mixing of different commands (even PQ) on the same channel/chain without the need to stop the engine to reconfigure the engine mode. Refactor the driver to be able to use that new feature on the Armada 38x, while keeping the old behaviour on the older SoCs. Signed-off-by: Lior Amsalem <alior@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Maxime Ripard authored
The current function names isn't very consistent, and functions with the same prefix might operate on either a channel or a descriptor, which is kind of confusing. Rename these functions to have a consistent and clearer naming scheme. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Lior Amsalem authored
This patch fixes a bug in the XOR driver where the cleanup function can be called and free descriptors that never been processed by the engine (which result in data errors). The cleanup function will free descriptors based on the ownership bit in the descriptors. Fixes: ff7b0479 ("dmaengine: DMA engine driver for Marvell XOR engine") Signed-off-by: Lior Amsalem <alior@marvell.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Cc: stable@vger.kernel.org Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 08 Jun, 2015 2 commits
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Michal Suchanek authored
The kernel is not trying to increase mcbufsz. It suggests you should try doing so. Also print the calculated required size of mcbufsz. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Hao Liu authored
add support for new CSR atlas7 SoC. atlas7 exists V1 and V2 IP. atlas7 DMAv1 is basically moved from marco, which has never been delivered to customers and renamed in this patch. atlas7 DMAv2 supports chain DMA by a chain table, this patch also adds chain DMA support for atlas7. atlas7 DMAv1 and DMAv2 co-exist in the same chip. there are some HW configuration differences(register offset etc.) with old prima2 chips, so we use compatible string to differentiate old prima2 and new atlas7, then results in different set in HW for them. Signed-off-by: Hao Liu <Hao.Liu@csr.com> Signed-off-by: Yanchang Li <Yanchang.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 02 Jun, 2015 2 commits
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Rameshwar Prasad Sahu authored
This patch fixes sparse warnings like incorrect type in assignment (different base types), cast to restricted __le64. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Stefan Agner authored
Fix function names in kernel-doc function comments. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 25 May, 2015 3 commits
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Joe Perches authored
Use the generic mechanism to declare a bitmap instead of unsigned long. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Maninder Singh authored
Currently pch pointer is already dereferenced before NULL check and thus we are getting below warning: warn: variable dereferenced before check 'pch' So initialize struct pl330_dmac *pl330 after NULL check of dma_pl330_chan *pch. Signed-off-by: Maninder Singh <maninder1.s@samsung.com> Reviewed-by: Vaneet Narang <v.narang@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Geert Uytterhoeven authored
dma_ts_shift[] isn't used outside this source file. All other users use the definition from arch/arm/mach-shmobile/dma-register.h. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 18 May, 2015 1 commit
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Maxime Ripard authored
In interleaved mode, we can expect to have different source and destination strides. Add support for such case to dmaengine. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 14 May, 2015 1 commit
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Peter Ujfalusi authored
The DRA7x has more peripherals with DMA requests than the sDMA can handle: 205 vs 127. All DMA requests are routed through the DMA crossbar, which can be configured to route selected incoming DMA requests to specific sDMA request. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 09 May, 2015 6 commits
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Peter Ujfalusi authored
Since the mapping between the hardware request lines and channels has been removed it no longer make sense to have too many channels. Set the number of channels to match with the number of logical channels supported by sDMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
Do not direct map the virtual channels to sDMA request number. When the sDMA is behind of a crossbar this direct mapping can cause situations when certain channel can not be requested since the crossbar request number will no longer match with the sDMA request line. The direct mapping for virtual channels with HW request lines will make it harder to implement MEM_TO_MEM mode for the driver. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
Use the dma-requests property from DT to get the number of DMA requests. In case of legacy boot or failure to find the property, use the default 127 as number of requests. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
Instead of magic numbers in the code, use define for number of logical DMA channels and DMA requests. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
The DRA7x has more peripherals with DMA requests than the sDMA can handle: 205 vs 127. All DMA requests are routed through the DMA crossbar, which can be configured to route selected incoming DMA requests to specific request line of the DMA controller. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
DMA routers are transparent devices used to mux DMA requests from peripherals to DMA controllers. They are used when the SoC integrates more devices with DMA requests then their controller can handle. DRA7x is one example of such SoC, where the sDMA can hanlde 128 DMA request lines, but in SoC level it has 205 DMA requests. The of_dma_router will be registered as of_dma_controller with special xlate function and additional parameters. The driver for the router is responsible to craft the dma_spec (in the of_dma_route_allocate callback) which can be used to requests a DMA channel from the real DMA controller. This way the router can be transparent for the system while remaining generic enough to be used in different environments. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 08 May, 2015 3 commits
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Jens Kuske authored
The H3 SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Add the proper config data and compatible string to support it. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Geert Uytterhoeven authored
Commit 3cd44dcd ("dmaengine: remove Renesas Audio DMAC peri peri") forgot to remove the header file with the platform data definitions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Leonardo Carreras authored
Removed checkpatch reported spaces in indentation: ERROR: code indent should use tabs where possible +^I PL080_CONFIG_TC_IRQ_MASK);$ Signed-off-by: Leonardo Carreras <leocarreras89@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 04 May, 2015 9 commits
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Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
The sDMA controller is capable of performing memory copy operation. It need to be configured to software triggered mode and without HW synchronization. The sDMA can copy data which is aligned to 8, 16 or 32 bits. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4Linus Torvalds authored
Pull ext4 fixes from Ted Ts'o: "Some miscellaneous bug fixes and some final on-disk and ABI changes for ext4 encryption which provide better security and performance" * tag 'for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4: ext4: fix growing of tiny filesystems ext4: move check under lock scope to close a race. ext4: fix data corruption caused by unwritten and delayed extents ext4 crypto: remove duplicated encryption mode definitions ext4 crypto: do not select from EXT4_FS_ENCRYPTION ext4 crypto: add padding to filenames before encrypting ext4 crypto: simplify and speed up filename encryption
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fixes from Dave Airlie: "One intel fix, one rockchip fix, and a bunch of radeon fixes for some regressions from audio rework and vm stability" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/i915/chv: Implement WaDisableShadowRegForCpd drm/radeon: fix userptr return value checking (v2) drm/radeon: check new address before removing old one drm/radeon: reset BOs address after clearing it. drm/radeon: fix lockup when BOs aren't part of the VM on release drm/radeon: add SI DPM quirk for Sapphire R9 270 Dual-X 2G GDDR5 drm/radeon: adjust pll when audio is not enabled drm/radeon: only enable audio streams if the monitor supports it drm/radeon: only mark audio as connected if the monitor supports it (v3) drm/radeon/audio: don't enable packets until the end drm/radeon: drop dce6_dp_enable drm/radeon: fix ordering of AVI packet setup drm/radeon: Use drm_calloc_ab for CS relocs drm/rockchip: fix error check when getting irq MAINTAINERS: add entry for Rockchip drm drivers
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- 03 May, 2015 3 commits
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Just a single intel fix * tag 'drm-intel-fixes-2015-04-30' of git://anongit.freedesktop.org/drm-intel: drm/i915/chv: Implement WaDisableShadowRegForCpd
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https://github.com/markyzq/kernel-drm-rockchipDave Airlie authored
one fix and maintainers update * 'drm-next0420' of https://github.com/markyzq/kernel-drm-rockchip: drm/rockchip: fix error check when getting irq MAINTAINERS: add entry for Rockchip drm drivers
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "This is three logical fixes (as 5 patches). The 3ware class of drivers were causing an oops with multiqueue by tearing down the command mappings after completing the command (where the variables in the command used to tear down the mapping were no-longer valid). There's also a fix for the qnap iscsi target which was choking on us sending it commands that were too long and a fix for the reworked aha1542 allocating GFP_KERNEL under a lock" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: 3w-9xxx: fix command completion race 3w-xxxx: fix command completion race 3w-sas: fix command completion race aha1542: Allocate memory before taking a lock SCSI: add 1024 max sectors black list flag
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