- 27 Sep, 2006 40 commits
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Paul Mundt authored
Nothing exciting here, just trivial fixes.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
If a channel is not TEI capable, don't try to request_irq().. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
This fixes a long-standing FIXME for G2 DMA, where we finally wire up the IRQ handler and allow for sampling remaining bytes while in-flight. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
This adds the VoyagerGX UART to the RTS7751R2D setup code, and cleans up a few build issues. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Inhibit mapping through page tables in __ioremap() for PCI memory apertures on SH7751 and SH7780-style PCI controllers, translation is not possible for these areas. For other users that map a small window in P1/P2 space, ioremap() traps that already, and should never make it to __ioremap(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
sh-sci was turning in to an unmaintainable mess, especially with regards to the port list. This cleans it up quite a bit, and switches over to a platform device model where subtypes will register their port list individually in their setup code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Some kgdb cleanup. Move hexchars/highhex/lowhex to the header, so it can be reused by sh-sci. Also drop silly ctrl_inl/outl() overloading being done by the kgdb stub. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
We had our own version, which serves no purpose. Simply hook SH in to the generic one. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Andriy Skulysh authored
This adds some simple PM stubs and the basic APM interfaces, primarily for use by hp6xx, where the existing userland expects it. Signed-off-by: Andriy Skulysh <askulysh@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Drop _PAGE_SHARED/_PAGE_U0_SHARED and document Linux PTE encodings in the PTEL value. Preserve the swap cache entry encoding semantics for now, though it will need rework to free up _PAGE_WT from _PAGE_FILE. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
This fell behind a bit, get it updated so the documentation has something in common with reality. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
SE73180 can use the generic support, we just need to wire up the IRQ demuxing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Andriy Skulysh authored
Trivial build fix. Signed-off-by: Andriy Skulysh <askulysh@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Some of the paths were a bit broken, fix it up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Make __xchg() a macro, so that gcc 4.0 doesn't blow up thanks to always_inline.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
No longer needed.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
With the store queue API rework, we need to change the in-kernel users too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Initial register bank cleanup. Make SR.RB configurable, and add some preliminary documentation on register bank usage within the kernel. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
This adds support for the Renesas SH7780 development boards, R7780RP and R7780MP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Rewrite the store queue API for a per-cpu interface in the driver model. The old miscdevice is dropped, due to TASK_SIZE limitations, and no one was using it anyways. Carve up and allocate store queue space with a bitmap, back sq mapping objects with a slab cache, and let userspace worry about its own prefetching. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
This updates the various boards for some of the recent I/O routine updates. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
There was a bug that got introduced when the split ptlock changes went in where mm could be unintialized for user mappings, this fixes it up.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
We need this set to something sensible anywhere were we have an aliasing dcache.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
ioremap() overhaul. Add support for transparent PMB mapping, get rid of p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the machvec, as everyone can use the generic ioremap() API instead. For PCI memory apertures and other special cases, use the pci_iomap() API, as boards are already required to get the mapping right there. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Cleanup of page table allocators, using generic folded PMD and PUD helpers. TLB flushing operations are moved to a more sensible spot. The page fault handler is also optimized slightly, we no longer waste cycles on IRQ disabling for flushing of the page from the ITLB, since we're already under CLI protection by the initial exception handler. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Some modules seem to need this, so we export it.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Add support for 32-bit physical addressing through the SH-4A Privileged Space Mapping Buffer (PMB). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Jamie Lenehan authored
Add support for the titan board. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
A synco is needed before we jump to start_kernel(). While we're at it, also move the sh_cpu_init() jump until after we've zeroed BSS, as this has caused some undesirable results in sh_cpu_init(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Currently when making changes to control registers, we typically need some time for changes to take effect (8 nops, generally). However, for sh4a we simply need to do an icbi.. This is a simple patch for implementing a general purpose ctrl_barrier() which functions as a control register write barrier. There's some additional documentation in the patch itself, but it's pretty self explanatory. There were also some places where we were not doing the barrier, which didn't seem to have any adverse effects on legacy parts, but certainly did on sh4a. It's safer to have the barrier in place for legacy parts as well in these cases, though this does make flush_tlb_all() more expensive (by an order of 8 nops). We can ifdef around the flush_tlb_all() case for now if it's clear that all legacy parts won't have a problem with this. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Add CPU_HAS_PTEA, refactor some of the cpu flag settings. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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kogiidena authored
This adds support for the I-O DATA Landisk. Signed-off-by: kogiidena <kogiidena@eggplant.ddo.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Drop virt_to_bus() from sg_dma_address() so libata builds. While we're at it, move sg_dma_address() and sg_dma_len() from pci.h to scatterlist.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Ollie Wild authored
There's a bug in the Hitachi SuperH csum_partial_copy_generic() implementation. If the supplied length is 1 (and several alignment conditions are met), the function immediately branches to label 4. However, the assembly at label 4 expects the length to be stored in register r2. Since this has not occurred, subsequent behavior is undefined. This can cause bad payload checksums in TCP connections. I've fixed the problem by initializing register r2 prior to the branch instruction. Signed-off-by: Ollie Wild <aaw@rincewind.tv> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
We had a pretty interesting oops happening, where copy_user_page() was down()'ing p3map_sem[] with a bogus offset (particularly, an offset that hadn't been initialized with sema_init(), due to the mismatch between cpu_data->dcache.n_aliases and what was assumed based off of the old CACHE_ALIAS value). Luckily, spinlock debugging caught this for us, and so we drop the old hardcoded CACHE_ALIAS for sh4 completely and rely on the run-time probed cpu_data->dcache.alias_mask. This in turn gets the p3map_sem[] index right, and everything works again. While we're at it, also convert to 4-level page tables.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
The syscall table has lagged behind a bit, wire up the new ones.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Alexey Dobriyan authored
It's defined in <linux/cpumask.h> and log is horribly flooded by "redefined" messages. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Merge support for SH7770 and SH7780 SH-4A subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
Update oprofile build rules for additional subtypes, particularly SH7750S/SH7091. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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